
MPC9350ACR2
ObsoleteIC PLL CLOCK GENERATOR 32TQFP
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MPC9350ACR2
ObsoleteIC PLL CLOCK GENERATOR 32TQFP
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Technical Specifications
Parameters and characteristics for this part
| Specification | MPC9350ACR2 |
|---|---|
| Differential - Input:Output | False |
| Divider/Multiplier | Yes/No |
| Frequency - Max [Max] | 200 MHz |
| Input | LVCMOS, Crystal |
| Mounting Type | Surface Mount |
| Number of Circuits | 1 |
| Operating Temperature [Max] | 85 °C |
| Operating Temperature [Min] | -40 °C |
| Output | LVCMOS |
| Package / Case | 32-LQFP |
| PLL | Yes with Bypass |
| Ratio - Input:Output [custom] | 3:9 |
| Supplier Device Package | 32-TQFP (7x7) |
| Type | PLL Clock Generator |
| Voltage - Supply [Max] | 3.465 V |
| Voltage - Supply [Min] | 2.375 V |
Pricing
Prices provided here are for design reference only. For realtime values and availability, please visit the distributors directly
| Distributor | Package | Quantity | $ | |
|---|---|---|---|---|
Description
General part information
MPC9350 Series
The MPC9350 is a 2.5 V and 3.3 V compatible, PLL-based clock generator targeted for high performance clock distribution systems. With output frequencies of up to 200 MHz and maximum output skews of 150 ps, the MPC9350 is ideal for the most demanding clock tree designs. The device offers 9 low skew clock outputs, with each one configurable to support the clocking needs of the various high-performance microprocessors, including the PowerQUICC II integrated communication microprocessor. The extended temperature range of the MPC9350 supports telecommunication and networking requirements. The device employs a fully differential PLL design to minimize cycle-to-cycle and long-term jitter.
Documents
Technical documentation and resources