Specification	SN74LVTH16952DL

Current - Output High, Low [custom]	64 mA
Current - Output High, Low [custom]	32 mA
Mounting Type	Surface Mount
Number of Bits per Element	8
Number of Elements	2
Operating Temperature [Max]	85 °C
Operating Temperature [Min]	-40 °C
Output Type	3-State
Package / Case	0.295 in
Package / Case	56-BSSOP
Package / Case	7.5 mm
Supplier Device Package	56-SSOP
Voltage - Supply [Max]	3.6 V
Voltage - Supply [Min]	2.7 V

SN74LVTH16952 Series

3.3 V ABT 16-Bit Registered Transceivers With 3-State Outputs

Part	Supplier Device Package	Operating Temperature [Max]	Operating Temperature [Min]	Number of Elements	Number of Bits per Element	Voltage - Supply [Min]	Voltage - Supply [Max]	Output Type	Package / Case	Package / Case	Package / Case	Mounting Type	Current - Output High, Low [custom]	Current - Output High, Low [custom]
Texas Instruments SN74LVTH16952DL	56-SSOP	85 °C	-40 °C	2	8	2.7 V	3.6 V	3-State	0.295 in	56-BSSOP	7.5 mm	Surface Mount	64 mA	32 mA
Texas Instruments SN74LVTH16952DLG4	56-SSOP	85 °C	-40 °C	2	8	2.7 V	3.6 V	3-State	0.295 in	56-BSSOP	7.5 mm	Surface Mount	64 mA	32 mA
Texas Instruments SN74LVTH16952DGGR	56-TSSOP	85 °C	-40 °C	2	8	2.7 V	3.6 V	3-State	0.24 in	56-TFSOP	6.1 mm	Surface Mount	64 mA	32 mA
Texas Instruments SN74LVTH16952DLR	56-SSOP	85 °C	-40 °C	2	8	2.7 V	3.6 V	3-State	0.295 in	56-BSSOP	7.5 mm	Surface Mount	64 mA	32 mA

Pricing

Prices provided here are for design reference only. For realtime values and availability, please visit the distributors directly

Distributor	Package	Quantity	$

Digikey	Tube	400	$ 2.38
Texas Instruments	TUBE	1	$ 2.85
		100	$ 2.35
		250	$ 1.69
		1000	$ 1.27

Description

General part information

SN74LVTH16952 Series

The 'LVTH16952 devices are 16-bit registered transceivers designed for low-voltage (3.3-V) VCCoperation, but with the capability to provide a TTL interface to a 5-V system environment.

These devices can be used as two 8-bit transceivers or one 16-bit transceiver. Data on the A or B bus is stored in the registers on the low-to-high transition of the clock (CLKAB or CLKBA) input, provided that the clock-enable (CLKENAB\ or CLKENBA\) input is low. Taking the output-enable (OEAB\ or OEBA\) input low accesses the data on either port.

Active bus-hold circuitry is provided to hold unused or floating data inputs at a valid logic level.