Specification	SN74HC540PWT

Current - Output High, Low [custom]	7.8 mA
Current - Output High, Low [custom]	7.8 mA
Logic Type	Inverting, Buffer
Mounting Type	Surface Mount
Number of Bits per Element	8
Number of Elements	1
Operating Temperature [Max]	85 °C
Operating Temperature [Min]	-40 °C
Output Type	3-State
Package / Case	20-TSSOP
Package / Case [x]	0.173 in
Package / Case [y]	4.4 mm
Supplier Device Package	20-TSSOP
Voltage - Supply [Max]	6 V
Voltage - Supply [Min]	2 V

CD74HC540 Series

8-ch, 2-V to 6-V inverters with 3-state outputs

Part	Number of Elements	Number of Bits per Element	Voltage - Supply [Min]	Voltage - Supply [Max]	Current - Output High, Low [custom]	Current - Output High, Low [custom]	Logic Type	Mounting Type	Package / Case [y]	Package / Case	Package / Case [x]	Output Type	Supplier Device Package	Operating Temperature [Max]	Operating Temperature [Min]	Package / Case [y]	Operating Temperature [Max]	Operating Temperature [Min]	Package / Case	Package / Case
Texas Instruments SN74HC540PWT	1	8	2 V	6 V	7.8 mA	7.8 mA	Buffer Inverting	Surface Mount	4.4 mm	20-TSSOP	0.173 in	3-State	20-TSSOP	85 °C	-40 °C
Texas Instruments SN74HC540DBR	1	8	2 V	6 V	7.8 mA	7.8 mA	Buffer Inverting	Surface Mount		20-SSOP		3-State	20-SSOP	85 °C	-40 °C
Texas Instruments SN74HC540DW	1	8	2 V	6 V	7.8 mA	7.8 mA	Buffer Inverting	Surface Mount	0.295 in	20-SOIC		3-State	20-SOIC	85 °C	-40 °C	7.5 mm
Texas Instruments CD74HC540M96	1	8	2 V	6 V	7.8 mA	7.8 mA	Buffer Inverting	Surface Mount	0.295 in	20-SOIC		3-State	20-SOIC			7.5 mm	125 °C	-55 °C
Texas Instruments SN74HC540PWR	1	8	2 V	6 V	7.8 mA	7.8 mA	Buffer Inverting	Surface Mount	4.4 mm	20-TSSOP	0.173 in	3-State	20-TSSOP	85 °C	-40 °C
Texas Instruments SN74HC540DWR	1	8	2 V	6 V	7.8 mA	7.8 mA	Buffer Inverting	Surface Mount	0.295 in	20-SOIC		3-State	20-SOIC	85 °C	-40 °C	7.5 mm
Texas Instruments SN74HC540N	1	8	2 V	6 V	7.8 mA	7.8 mA	Buffer Inverting	Through Hole		20-DIP		3-State	20-PDIP	85 °C	-40 °C				7.62 mm	0.3 in
Texas Instruments SN74HC540DWRE4	1	8	2 V	6 V	7.8 mA	7.8 mA	Buffer Inverting	Surface Mount	0.295 in	20-SOIC		3-State	20-SOIC	85 °C	-40 °C	7.5 mm
Texas Instruments SN74HC540DWG4	1	8	2 V	6 V	7.8 mA	7.8 mA	Buffer Inverting	Surface Mount	0.295 in	20-SOIC		3-State	20-SOIC	85 °C	-40 °C	7.5 mm
Texas Instruments SN74HC540NG4	1	8	2 V	6 V	7.8 mA	7.8 mA	Buffer Inverting	Through Hole		20-DIP		3-State	20-PDIP	85 °C	-40 °C				7.62 mm	0.3 in

Pricing

Prices provided here are for design reference only. For realtime values and availability, please visit the distributors directly

Distributor	Package	Quantity	$

Digikey	Cut Tape (CT)	1	$ 1.95
		10	$ 1.24
		25	$ 1.06
		100	$ 0.85
	Digi-Reel®	1	$ 1.95
		10	$ 1.24
		25	$ 1.06
		100	$ 0.85
	Tape & Reel (TR)	250	$ 0.84
		500	$ 0.74
		1250	$ 0.58
		2500	$ 0.54
		6250	$ 0.52
		12500	$ 0.50
Texas Instruments	SMALL T&R	1	$ 0.95
		100	$ 0.73
		250	$ 0.54
		1000	$ 0.39

Description

General part information

CD74HC540 Series

8-ch, 2-V to 6-V inverters with 3-state outputs

Documents

Technical documentation and resources

SNx4HC540 Octal Buffers and Line Drivers With 3-State Outputs datasheet (Rev. F)

Data sheet

CMOS Power Consumption and CPD Calculation (Rev. B)

Application note

Implications of Slow or Floating CMOS Inputs (Rev. E)

Application note

TI IBIS File Creation, Validation, and Distribution Processes

Application note

Understanding and Interpreting Standard-Logic Data Sheets (Rev. C)

Application note

SN74HC540PWT

Deep-Dive with AI

SN74HC540PWT

Deep-Dive with AI

Technical Specifications

CD74HC540 Series

Pricing

Description

CD74HC540 Series

Documents

Using High Speed CMOS and Advanced CMOS in Systems With Multiple Vcc

Logic Guide (Rev. AB)

LOGIC Pocket Data Book (Rev. B)

SN54/74HCT CMOS Logic Family Applications and Restrictions

Semiconductor Packing Material Electrostatic Discharge (ESD) Protection

Live Insertion

Signal Switch Data Book (Rev. A)

Designing With Logic (Rev. C)

Input and Output Characteristics of Digital Integrated Circuits

SNx4HC540 Octal Buffers and Line Drivers With 3-State Outputs datasheet (Rev. F)

CMOS Power Consumption and CPD Calculation (Rev. B)

Implications of Slow or Floating CMOS Inputs (Rev. E)

TI IBIS File Creation, Validation, and Distribution Processes

Understanding and Interpreting Standard-Logic Data Sheets (Rev. C)

CD74HC540 Series