Integrated Circuits (ICs)

SN74ABT240ADW

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8-CH, 4.5-V TO 5.5-V INVERTERS WITH TTL-COMPATIBLE CMOS INPUTS AND 3-STATE OUTPUTS

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Search across all available documentation for this part.

DocumentsInput and Output Characteristics of Digital Integrated Circuits Family of Curves Demonstrating Output Skews for Advanced BiCMOS Devices (Rev. A)+17

Integrated Circuits (ICs)

SN74ABT240ADW

Active

Texas Instruments

8-CH, 4.5-V TO 5.5-V INVERTERS WITH TTL-COMPATIBLE CMOS INPUTS AND 3-STATE OUTPUTS

Deep-Dive with AI

DocumentsInput and Output Characteristics of Digital Integrated Circuits Family of Curves Demonstrating Output Skews for Advanced BiCMOS Devices (Rev. A)+17

Specifications Series Pricing Description Documents

Technical Specifications

Parameters and characteristics for this part

Specification	SN74ABT240ADW

Current - Output High, Low [custom]	64 mA
Current - Output High, Low [custom]	32 mA
Logic Type	Inverting, Buffer
Mounting Type	Surface Mount
Number of Bits per Element	4
Number of Elements	2
Operating Temperature [Max]	85 °C
Operating Temperature [Min]	-40 °C
Output Type	3-State
Package / Case	20-SOIC
Package / Case [y]	0.295 in
Package / Case [y]	7.5 mm
Supplier Device Package	20-SOIC
Voltage - Supply [Max]	5.5 V
Voltage - Supply [Min]	4.5 V

SN74ABT240A Series

8-ch, 4.5-V to 5.5-V inverters with TTL-compatible CMOS inputs and 3-state outputs

Part	Operating Temperature [Max]	Operating Temperature [Min]	Number of Bits per Element	Voltage - Supply [Min]	Voltage - Supply [Max]	Package / Case	Package / Case	Package / Case	Number of Elements	Output Type	Mounting Type	Logic Type	Supplier Device Package	Current - Output High, Low [custom]	Current - Output High, Low [custom]	Package / Case [y]	Package / Case [y]	Package / Case [x]
Texas Instruments SN74ABT240AN	85 °C	-40 °C	4	4.5 V	5.5 V	20-DIP	7.62 mm	0.3 in	2	3-State	Through Hole	Buffer Inverting	20-PDIP	64 mA	32 mA
Texas Instruments SN74ABT240ADW	85 °C	-40 °C	4	4.5 V	5.5 V	20-SOIC			2	3-State	Surface Mount	Buffer Inverting	20-SOIC	64 mA	32 mA	0.295 in	7.5 mm
Texas Instruments SN74ABT240APWR	85 °C	-40 °C	4	4.5 V	5.5 V	20-TSSOP			2	3-State	Surface Mount	Buffer Inverting	20-TSSOP	64 mA	32 mA	4.4 mm		0.173 in
Texas Instruments SN74ABT240ADBLE
Texas Instruments SN74ABT240ADBRG4	85 °C	-40 °C	4	4.5 V	5.5 V	20-SSOP			2	3-State	Surface Mount	Buffer Inverting	20-SSOP	64 mA	32 mA
Texas Instruments SN74ABT240ADWR	85 °C	-40 °C	4	4.5 V	5.5 V	20-SOIC			2	3-State	Surface Mount	Buffer Inverting	20-SOIC	64 mA	32 mA	0.295 in	7.5 mm
Texas Instruments SN74ABT240ANSR	85 °C	-40 °C	4	4.5 V	5.5 V	20-SOIC	5.3 mm	0.209 "	2	3-State	Surface Mount	Buffer Inverting	20-SO	64 mA	32 mA
Texas Instruments SN74ABT240ADWRG4	85 °C	-40 °C	4	4.5 V	5.5 V	20-SOIC			2	3-State	Surface Mount	Buffer Inverting	20-SOIC	64 mA	32 mA	0.295 in	7.5 mm
Texas Instruments SN74ABT240APWLE

Pricing

Prices provided here are for design reference only. For realtime values and availability, please visit the distributors directly

Distributor	Package	Quantity	$

Digikey	Tube	1	$ 1.98
		10	$ 1.26
		25	$ 1.07
		100	$ 0.86
		250	$ 0.76
		500	$ 0.69
		1000	$ 0.64
		2500	$ 0.58
		5000	$ 0.55
Texas Instruments	TUBE	1	$ 0.97
		100	$ 0.75
		250	$ 0.55
		1000	$ 0.39

Description

General part information

SN74ABT240A Series

These octal buffers and line drivers are designed specifically to improve both the performance and density of 3-state memory address drivers, clock drivers, and bus-oriented receivers and transmitters. Together with the SN54ABT241, SN74ABT241A, SN54ABT244, and SN74ABT244A, these devices provide the choice of selected combinations of inverting and noninverting outputs, symmetrical active-low output-enable (OE)\ inputs, and complementary OE and OE\ inputs.

The SN54ABT240 and SN74ABT240A are organized as two 4-bit buffers/line drivers with separate OE\ inputs. When OE\ is low, the devices pass inverted data from the A inputs to the Y outputs. When OE\ is high, the outputs are in the high-impedance state.

This device is fully specified for partial-power-down applications using Ioff. The Ioffcircuitry disables the outputs, preventing damaging current backflow through the device when it is powered down.

Documents

Technical documentation and resources

SN74ABT240ADW

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SN74ABT240ADW

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Technical Specifications

SN74ABT240A Series

Pricing

Description

SN74ABT240A Series

Documents

Input and Output Characteristics of Digital Integrated Circuits

Family of Curves Demonstrating Output Skews for Advanced BiCMOS Devices (Rev. A)

Advanced Bus Interface Logic Selection Guide

Understanding and Interpreting Standard-Logic Data Sheets (Rev. C)

Advanced BiCMOS Technology (ABT) Logic Enables Optimal System Design (Rev. A)

TI IBIS File Creation, Validation, and Distribution Processes

Semiconductor Packing Material Electrostatic Discharge (ESD) Protection

Quad Flatpack No-Lead Logic Packages (Rev. D)

LOGIC Pocket Data Book (Rev. B)

Live Insertion

Selecting the Right Level Translation Solution (Rev. A)

Bus-Interface Devices With Output-Damping Resistors Or Reduced-Drive Outputs (Rev. A)

Logic Guide (Rev. AB)

Designing With Logic (Rev. C)

Understanding Advanced Bus-Interface Products Design Guide

Advanced BiCMOS Technology (ABT) Logic Characterization Information (Rev. B)

Power-Up 3-State (PU3S) Circuits in TI Standard Logic Devices

Octal Buffers/Drivers With 3-State Outputs datasheet (Rev. I)

Implications of Slow or Floating CMOS Inputs (Rev. E)

SN74ABT240A Series