Specification	LMK1D1212RHAT

Differential - Input:Output [custom]	True
Differential - Input:Output [custom]	True
Frequency - Max [Max]	2 GHz
Input	LVCMOS, HCSL, CML, LVDS, LVPECL
Mounting Type	Surface Mount
Number of Circuits	1
Operating Temperature [Max]	105 °C
Operating Temperature [Min]	-40 °C
Output	LVDS, Clock
Package / Case	40-VFQFN Exposed Pad
Ratio - Input:Output	2:12
Supplier Device Package	40-VQFN (6x6)
Type	Clock Buffer
Voltage - Supply [Max]	3.465 V, 2.625 V, 1.89 V
Voltage - Supply [Min]	2.375 V, 1.71 V, 3.135 V

LMK1D1212 Series

12-channel output 1.8-V, 2.5-V, and 3.3-V LVDS buffer

Part	Differential - Input:Output [custom]	Differential - Input:Output [custom]	Package / Case	Supplier Device Package	Mounting Type	Ratio - Input:Output	Output	Input	Number of Circuits	Operating Temperature [Max]	Operating Temperature [Min]	Voltage - Supply [Min]	Voltage - Supply [Max]	Type	Frequency - Max [Max]
Texas Instruments LMK1D1212RHAT			40-VFQFN Exposed Pad	40-VQFN (6x6)	Surface Mount	2:12	Clock LVDS	CML HCSL LVCMOS LVDS LVPECL	1	105 °C	-40 °C	1.71 V 2.375 V 3.135 V	1.89 V 2.625 V 3.465 V	Clock Buffer	2 GHz

Pricing

Prices provided here are for design reference only. For realtime values and availability, please visit the distributors directly

Distributor	Package	Quantity	$

Digikey	Cut Tape (CT)	1	$ 12.25
		10	$ 11.26
		25	$ 10.79
		100	$ 9.51
	Digi-Reel®	1	$ 12.25
		10	$ 11.26
		25	$ 10.79
		100	$ 9.51
	Tape & Reel (TR)	250	$ 9.04
		500	$ 8.46
		1250	$ 7.76
Texas Instruments	SMALL T&R	1	$ 9.59
		100	$ 8.38
		250	$ 6.46
		1000	$ 5.78

Description

General part information

LMK1D1212 Series

The LMK1D1212 clock buffer distributes with minimum skew one of two selectable clock inputs (IN0, IN1) to 12 pairs of differential LVDS clock outputs (OUT0 through OUT11). Similarly, the LMK1D1216 distributes 16 pairs of differential LVDS clock outputs (OUT0 through OUT15). The LMK1D121x family can accept two clock sources into an input multiplexer. The inputs can either be LVDS, LVPECL, LP-HCSL, HCSL, CML, or LVCMOS.

The LMK1D121x is specifically designed for driving 50-Ω transmission lines. When driving inputs in single-ended mode, apply the appropriate bias voltage to the unused negative input pin.

The IN_SEL pin selects the input which is routed to the outputs. If this pin is left open, it disables the outputs (static low). The part supports a fail-safe function. The device further incorporates an input hysteresis which prevents random oscillation of the outputs in the absence of an input signal.

Documents

Technical documentation and resources

LMK1D121x Low Additive Jitter LVDS Buffer datasheet (Rev. A)

Data sheet

LMK1D1212EVM User's Guide

User guide