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LM97593VH/NOPB
Integrated Circuits (ICs)

LM97593VH/NOPB

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Texas Instruments

DUAL ADC / DIGITAL TUNER / AGC

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LM97593VH/NOPB
Integrated Circuits (ICs)

LM97593VH/NOPB

Active
Texas Instruments

DUAL ADC / DIGITAL TUNER / AGC

Technical Specifications

Parameters and characteristics for this part

SpecificationLM97593VH/NOPB
Data InterfaceSerial, Parallel
Mounting TypeSurface Mount
Number of Channels [custom]2
Operating Temperature [Max]85 °C
Operating Temperature [Min]-40 °C
Package / Case128-BFQFP
Resolution (Bits)12 b
Sampling Rate (Per Second)65 M
Supplier Device Package128-PQFP (14x20)
TypeAGC, Digital Tuner, ADC
Voltage - Supply1.8 V, 3.3 V
Voltage Supply SourceAnalog and Digital

Pricing

Prices provided here are for design reference only. For realtime values and availability, please visit the distributors directly

DistributorPackageQuantity$
DigikeyTray 1$ 44.72
Texas InstrumentsJEDEC TRAY (10+1) 1$ 62.95
100$ 55.96
250$ 46.00
1000$ 41.15

Description

General part information

LM97593 Series

The LM97593 Dual ADC / Digital Tuner / AGC IC is a two channel digital downconverter (DDC) with integrated 12-bit analog-to-digital converters (ADCs) and automatic gain control (AGC). The LM97593 further enhances TI’s Diversity Receiver Chipset (DRCS) by integrating a wide-bandwidth dual ADC core with the DDC. The complete DRCS includes one LM97593 Dual ADC / Digital Tuner / AGC and two CLC5526 digitally controlled variable gain amplifiers (DVGAs). This system allows direct IF sampling of signals up to 300MHz for enhanced receiver performance and reduced system costs. A block diagram for a DRCS-based narrowband communications system is shown in .

The LM97593 offers high dynamic range digital tuning and filtering based on hard-wired digital signal processing (DSP) technology. Each channel has independent tuning, phase offset, filter coefficients, and gain settings. Channel filtering is performed by a series of three filters. The first is a 4-stage Cascaded Integrator Comb (CIC) filter with a programmable decimation ratio from 8 to 2048. Next there are two symmetric FIR filters, a 21-tap and a 63-tap, both with independent programmable coefficients. The first FIR filter decimates the data by 2, the second FIR decimates by either 2 or 4. Channel filter bandwidth at 52MSPS ranges from ±650kHz down to ±1.3kHz. At 65MSPS, the maximum bandwidth increases to ±812kHz.

The LM97593’s AGC controller monitors the ADC output and controls the ADC input signal level by adjusting the DVGA setting. AGC threshold, deadband+hysteresis, and the loop time constant are user defined. Total dynamic range of greater than 123dB full-scale signal to noise in a 200kHz bandwidth can be achieved with the Diversity Receiver Chipset.

Documents

Technical documentation and resources