Zenode.ai Logo
Beta
16 SO
Integrated Circuits (ICs)

SN74LS109ANSR

Active
Texas Instruments

4.75V~5.25V JK-TYPE 33MHZ 8MA 25NS@5V,15PF SO-16-208MIL FLIP FLOPS ROHS

Deep-Dive with AI

Search across all available documentation for this part.

16 SO
Integrated Circuits (ICs)

SN74LS109ANSR

Active
Texas Instruments

4.75V~5.25V JK-TYPE 33MHZ 8MA 25NS@5V,15PF SO-16-208MIL FLIP FLOPS ROHS

Technical Specifications

Parameters and characteristics for this part

SpecificationSN74LS109ANSR
Clock Frequency33 MHz
Current - Output High, Low [custom]400 µA
Current - Output High, Low [custom]8 mA
Current - Quiescent (Iq)8 mA
FunctionReset, Set(Preset)
Max Propagation Delay @ V, Max CL25 ns
Mounting TypeSurface Mount
Number of Bits per Element1
Number of Elements2
Operating Temperature [Max]70 °C
Operating Temperature [Min]0 °C
Output TypeComplementary
Package / Case0.209 "
Package / Case16-SOIC
Package / Case5.3 mm
Supplier Device Package16-SO
Trigger TypePositive Edge
TypeJK Type
Voltage - Supply [Max]5.25 V
Voltage - Supply [Min]4.75 V

Pricing

Prices provided here are for design reference only. For realtime values and availability, please visit the distributors directly

DistributorPackageQuantity$
DigikeyCut Tape (CT) 1$ 1.59
10$ 1.43
25$ 1.35
100$ 1.15
250$ 1.08
500$ 0.94
1000$ 0.78
Digi-Reel® 1$ 1.59
10$ 1.43
25$ 1.35
100$ 1.15
250$ 1.08
500$ 0.94
1000$ 0.78
Tape & Reel (TR) 2000$ 0.67
LCSCPiece 1$ 0.58
200$ 0.23
500$ 0.22
1000$ 0.21
Texas InstrumentsLARGE T&R 1$ 1.45
100$ 1.11
250$ 0.82
1000$ 0.59

Description

General part information

SN74LS109A Series

These devices contain two independent J-K\ positive-edge-triggered flip-flops. A low level at the preset or clear inputs sets or resets the outputs regardless of the levels of the other inputs. When preset and clear are inactive (high), data at the J and K\ inputs meeting the setup time requirements are transferred to the outputs on the positive-going edge of the clock pulse. Clock triggering occurs at a voltage level and is not directly related to the rise time of the clock pulse. Following the hold time interval, data at the J and K\ inputs may be changed without affecting the levels at the outputs. These versatile flip-flops can perform as toggle flip-flops by grounding K\ and tying J high. They also can perform as D-type flip-flops if J and K\ are tied together.

The SN54109 and SN54LS109A are characterized for operation over the full military temperature range of -55°C to 125°C. The SN74109 and SN74LS109A are characterized for operation from 0°C to 70°C.

These devices contain two independent J-K\ positive-edge-triggered flip-flops. A low level at the preset or clear inputs sets or resets the outputs regardless of the levels of the other inputs. When preset and clear are inactive (high), data at the J and K\ inputs meeting the setup time requirements are transferred to the outputs on the positive-going edge of the clock pulse. Clock triggering occurs at a voltage level and is not directly related to the rise time of the clock pulse. Following the hold time interval, data at the J and K\ inputs may be changed without affecting the levels at the outputs. These versatile flip-flops can perform as toggle flip-flops by grounding K\ and tying J high. They also can perform as D-type flip-flops if J and K\ are tied together.