
CD54HCT163F
ActiveHIGH SPEED CMOS LOGIC 4-BIT BINARY COUNTER WITH SYNCHRONOUS RESET
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CD54HCT163F
ActiveHIGH SPEED CMOS LOGIC 4-BIT BINARY COUNTER WITH SYNCHRONOUS RESET
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Technical Specifications
Parameters and characteristics for this part
| Specification | CD54HCT163F |
|---|---|
| Count Rate | 30 MHz |
| Direction | Up |
| Logic Type | Binary Counter |
| Mounting Type | Through Hole |
| Number of Bits per Element | 4 |
| Number of Elements | 1 |
| Operating Temperature [Max] | 125 °C |
| Operating Temperature [Min] | -55 °C |
| Package / Case | 7.62 mm, 0.3 in |
| Package / Case | 16-CDIP |
| Reset | Synchronous |
| Supplier Device Package | 16-CDIP |
| Timing | Synchronous |
| Trigger Type | Positive Edge |
| Voltage - Supply [Max] | 5.5 V |
| Voltage - Supply [Min] | 4.5 V |
Pricing
Prices provided here are for design reference only. For realtime values and availability, please visit the distributors directly
| Distributor | Package | Quantity | $ | |
|---|---|---|---|---|
| Digikey | Bulk | 19 | $ 15.97 | |
| Texas Instruments | TUBE | 1 | $ 21.11 | |
| 100 | $ 18.44 | |||
| 250 | $ 14.22 | |||
| 1000 | $ 12.72 | |||
Description
General part information
CD54HCT163 Series
The ’HC161, ’HCT161, ’HC163, and ’HCT163 are presettable synchronous counters that feature look-ahead carry logic for use in high-speed counting applications. The ’HC161 and ’HCT161 are asynchronous reset decade and binary counters, respectively; the ’HC163 and ’HCT163 devices are decade and binary counters, respectively, that are reset synchronously with the clock. Counting and parallel presetting are both accomplished synchronously with the negative-to-positive transition of the clock.
A low level on the synchronous parallel enable input, SPE, disables counting operation and allows data at the P0 to P3 inputs to be loaded into the counter (provided that the setup and hold requirements for SPE are met).
All counters are reset with a low level on the Master Reset input, MR. In the ’HC163 and ’HCT163 counters (synchronous reset types), the requirements for setup and hold time with respect to the clock must be met.
Documents
Technical documentation and resources