
Deep-Dive with AI
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Deep-Dive with AI
Technical Specifications
Parameters and characteristics for this part
| Specification | ADS1258V2EVM-PDK |
|---|---|
| Data Interface | SPI |
| Input Range [Max] | 5 V |
| Input Range [Min] | 0 V |
| Number of A/D Converters | 1 |
| Number of Bits | 24 |
| Power (Typ) @ Conditions | 42 mW |
| Supplied Contents | Board(s) |
| Utilized IC / Part | ADS1258 |
Pricing
Prices provided here are for design reference only. For realtime values and availability, please visit the distributors directly
| Distributor | Package | Quantity | $ | |
|---|---|---|---|---|
| Digikey | Bulk | 1 | $ 358.54 | |
| 10 | $ 343.39 | |||
| 25 | $ 335.81 | |||
Description
General part information
ADS1258-EP Series
The ADS1258 is a 16-channel (multiplexed), low-noise, 24-bit, delta-sigma () analog-to-digital converter (ADC) that provides single-cycle settled data at channel scan rates from 1.8k to 23.7k samples per second (SPS) per channel. A flexible input multiplexer accepts combinations of eight differential or 16 single-ended inputs with a full-scale differential range of 5 V or true bipolar range of ±2.5 V when operating with a 5-V reference. The fourth-order delta-sigma modulator is followed by a fifth-order sinc digital filter optimized for low-noise performance.
The differential output of the multiplexer is accessible to allow signal conditioning prior to the input of the ADC. Internal system monitor registers provide supply voltage, temperature, reference voltage, gain, and offset data.
An onboard PLL generates the system clock from a 32.768-kHz crystal, or can be overridden by an external clock source. A buffered system clock output (15.7 MHz) is provided to drive a microcontroller or additional converters.
Documents
Technical documentation and resources