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56-TSSOP
Integrated Circuits (ICs)

SN74CBT16811CDLR

Obsolete
Texas Instruments

IC BUS SWITCH 12 X 1:1 56SSOP

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56-TSSOP
Integrated Circuits (ICs)

SN74CBT16811CDLR

Obsolete
Texas Instruments

IC BUS SWITCH 12 X 1:1 56SSOP

Deep-Dive with AI

DocumentsDatasheet

Technical Specifications

Parameters and characteristics for this part

SpecificationSN74CBT16811CDLR
Circuit [custom]1:1
Circuit [custom]12
Independent Circuits2
Mounting TypeSurface Mount
Operating Temperature [Max]85 °C
Operating Temperature [Min]-40 °C
Package / Case0.295 in
Package / Case56-BSSOP
Package / Case7.5 mm
Supplier Device Package56-SSOP
TypeBus Switch
Voltage - Supply [Max]5.5 V
Voltage - Supply [Min]4 V
Voltage Supply SourceSingle Supply

Pricing

Prices provided here are for design reference only. For realtime values and availability, please visit the distributors directly

DistributorPackageQuantity$
DigikeyBulk 260$ 1.15

Description

General part information

SN74CBT16811C Series

The SN74CBT16811C is a high-speed TTL-compatible FET bus switch with low ON-state resistance (ron), allowing for minimal propagation delay. Active Undershoot-Protection Circuitry on the A and B ports of the SN74CBT16811C provides protection for undershoot up to –2 V by sensing an undershoot event and ensuring that the switch remains in the proper OFF state. The device also precharges the B port to a user-selectable bias voltage (BIASV) to minimize live-insertion noise.

The SN74CBT16811C is organized as two 12-bit bus switches with separate output-enable (1OE\, 2OE\) inputs. It can be used as two 12-bit bus switches or as one 24-bit bus switch. When OE\ is low, the associated 12-bit bus switch is ON, and the A port is connected to the B port, allowing bidirectional data flow between ports. When OE\ is high, the associated 12-bit bus switch is OFF, and a high-impedance state exists between the A and B ports. The B port is precharged to BIASV through the equivalent of a 10-kresistor when OE\ is high, or if the device is powered down (VCC= 0 V).

During insertion (or removal) of a card into (or from) an active bus, the card’s output voltage may be close to GND. When the connector pins make contact, the card’s parasitic capacitance tries to force the bus signal to GND, creating a possible glitch on the active bus. This glitching effect can be reduced by using a bus switch with precharged bias voltage (BIASV) of the bus switch equal to the input threshold voltage level of the receivers on the active bus. This method will ensure that any glitch produced by insertion (or removal) of the card will not cross the input threshold region of the receivers on the active bus, minimizing the effects of live-insertion noise.

Documents

Technical documentation and resources