Integrated Circuits (ICs)

SN74HCT373PW

Obsolete

Texas Instruments

OCTAL TRANSPARENT D-TYPE LATCHES WITH 3-STATE OUTPUTS

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Search across all available documentation for this part.

DocumentsDatasheet Logic Guide (Rev. AB)+11

Integrated Circuits (ICs)

SN74HCT373PW

Obsolete

Texas Instruments

OCTAL TRANSPARENT D-TYPE LATCHES WITH 3-STATE OUTPUTS

Deep-Dive with AI

DocumentsDatasheet Logic Guide (Rev. AB)+11

Specifications Series Pricing Description Documents

Technical Specifications

Parameters and characteristics for this part

Specification	SN74HCT373PW

Circuit [custom]	8
Circuit [custom]	8
Current - Output High, Low [custom]	6 mA
Current - Output High, Low [custom]	6 mA
Delay Time - Propagation	25 ns
Independent Circuits	1
Logic Type	D-Type Transparent Latch
Mounting Type	Surface Mount
Operating Temperature [Max]	85 °C
Operating Temperature [Min]	-40 °C
Output Type	Tri-State
Package / Case	20-TSSOP
Package / Case [x]	0.173 in
Package / Case [y]	4.4 mm
Supplier Device Package	20-TSSOP
Voltage - Supply [Max]	5.5 V
Voltage - Supply [Min]	4.5 V

SN74HCT373A Series

High Speed CMOS Logic Octal Transparent Latches with 3-State Outputs

Part	Independent Circuits	Package / Case	Package / Case	Package / Case	Delay Time - Propagation	Output Type	Voltage - Supply [Min]	Voltage - Supply [Max]	Mounting Type	Circuit [custom]	Circuit [custom]	Operating Temperature [Max]	Operating Temperature [Min]	Supplier Device Package	Logic Type	Current - Output High, Low [custom]	Current - Output High, Low [custom]	Package / Case [y]	Package / Case [x]	Package / Case [y]	Circuit
Texas Instruments SN74HCT373AN	1	20-DIP	7.62 mm	0.3 in	21 ns	Tri-State	4.5 V	5.5 V	Through Hole	8	8	85 °C	-40 °C	20-PDIP	D-Type Transparent Latch	6 mA	6 mA
Texas Instruments SN74HCT373PW	1	20-TSSOP			25 ns	Tri-State	4.5 V	5.5 V	Surface Mount	8	8	85 °C	-40 °C	20-TSSOP	D-Type Transparent Latch	6 mA	6 mA	4.4 mm	0.173 in
Texas Instruments SN74HCT373N	1	20-DIP	7.62 mm	0.3 in	25 ns	Tri-State	4.5 V	5.5 V	Through Hole	8	8	85 °C	-40 °C	20-PDIP	D-Type Transparent Latch	6 mA	6 mA
Texas Instruments SN74HCT373NSR	1	20-SOIC	5.3 mm	0.209 "	25 ns	Tri-State	4.5 V	5.5 V	Surface Mount	8	8	85 °C	-40 °C	20-SO	D-Type Transparent Latch	6 mA	6 mA
Texas Instruments SN74HCT373DWR	1	20-SOIC			25 ns	Tri-State	4.5 V	5.5 V	Surface Mount	8	8	85 °C	-40 °C	20-SOIC	D-Type Transparent Latch	6 mA	6 mA	0.295 in		7.5 mm
Texas Instruments CD74HCT373E-NG	1	20-DIP	7.62 mm	0.3 in	35 ns	Tri-State	4.5 V	5.5 V	Through Hole	8	8	125 °C	-55 °C	20-PDIP	D-Type Transparent Latch	6 mA	6 mA
Texas Instruments SN74HCT373DWE4	1	20-SOIC			25 ns	Tri-State	4.5 V	5.5 V	Surface Mount			85 °C	-40 °C	20-SOIC	D-Type Transparent Latch	6 mA	6 mA	0.295 in		7.5 mm	1:8
Texas Instruments SN74HCT373PWRE4	1	20-TSSOP			25 ns	Tri-State	4.5 V	5.5 V	Surface Mount	8	8	85 °C	-40 °C	20-TSSOP	D-Type Transparent Latch	6 mA	6 mA	4.4 mm	0.173 in
Texas Instruments CD74HCT373M96G4	1	20-SOIC			35 ns	Tri-State	4.5 V	5.5 V	Surface Mount	8	8	125 °C	-55 °C	20-SOIC	D-Type Transparent Latch	6 mA	6 mA	0.295 in		7.5 mm
Texas Instruments CD74HCT373M96	1	20-SOIC			35 ns	Tri-State	4.5 V	5.5 V	Surface Mount	8	8	125 °C	-55 °C	20-SOIC	D-Type Transparent Latch	6 mA	6 mA	0.295 in		7.5 mm

Pricing

Prices provided here are for design reference only. For realtime values and availability, please visit the distributors directly

Distributor	Package	Quantity	$

Texas Instruments	TUBE	1	$ 0.94
		100	$ 0.72
		250	$ 0.53
		1000	$ 0.38

Description

General part information

SN74HCT373A Series

High Speed CMOS Logic Octal Transparent Latches with 3-State Outputs

Documents

Technical documentation and resources

Datasheet

SN74HCT373PW

Deep-Dive with AI

SN74HCT373PW

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Technical Specifications

SN74HCT373A Series

Pricing

Description

SN74HCT373A Series

Documents

Datasheet

Logic Guide (Rev. AB)

Implications of Slow or Floating CMOS Inputs (Rev. E)

SN54/74HCT CMOS Logic Family Applications and Restrictions

LOGIC Pocket Data Book (Rev. B)

Understanding and Interpreting Standard-Logic Data Sheets (Rev. C)

Using High Speed CMOS and Advanced CMOS in Systems With Multiple Vcc

Semiconductor Packing Material Electrostatic Discharge (ESD) Protection

Signal Switch Data Book (Rev. A)

TI IBIS File Creation, Validation, and Distribution Processes

Power-Up Behavior of Clocked Devices (Rev. B)

Designing With Logic (Rev. C)

CMOS Power Consumption and CPD Calculation (Rev. B)

SN74HCT373A Series