Specification	SN74ABT8245DW

Logic Type	Scan Test Device with Bus Transceivers
Mounting Type	Surface Mount
Number of Bits	8
Operating Temperature [Max]	85 °C
Operating Temperature [Min]	-40 °C
Package / Case	24-SOIC
Package / Case [custom]	7.5 mm
Package / Case [custom]	0.295 in
Supplier Device Package	24-SOIC
Supply Voltage [Max]	5.5 V
Supply Voltage [Min]	4.5 V

SN74ABT8245 Series

Scan Test Devices With Octal Bus Transceivers

Part	Mounting Type	Logic Type	Package / Case [custom]	Package / Case	Package / Case [custom]	Operating Temperature [Max]	Operating Temperature [Min]	Number of Bits	Supplier Device Package	Supply Voltage [Min]	Supply Voltage [Max]
Texas Instruments SN74ABT8245DWG4	Surface Mount	Scan Test Device with Bus Transceivers	7.5 mm	24-SOIC	0.295 in	85 °C	-40 °C	8	24-SOIC	4.5 V	5.5 V
Texas Instruments SN74ABT8245DW	Surface Mount	Scan Test Device with Bus Transceivers	7.5 mm	24-SOIC	0.295 in	85 °C	-40 °C	8	24-SOIC	4.5 V	5.5 V

Pricing

Prices provided here are for design reference only. For realtime values and availability, please visit the distributors directly

Distributor	Package	Quantity	$

Digikey	Tube	1	$ 5.75
		10	$ 5.20
		25	$ 4.95
		100	$ 4.30
		250	$ 4.25
Texas Instruments	TUBE	1	$ 6.26
		100	$ 5.11
		250	$ 4.01
		1000	$ 3.40

Description

General part information

SN74ABT8245 Series

The 'ABT8245 scan test devices with octal bus transceivers are members of the Texas Instruments SCOPETMtestability integrated-circuit family. This family of devices supports IEEE Standard 1149.1-1990 boundary scan to facilitate testing of complex circuit-board assemblies. Scan access to the test circuitry is accomplished via the 4-wire test access port (TAP) interface.

In the normal mode, these devices are functionally equivalent to the 'F245 and 'ABT245 octal bus transceivers. The test circuitry can be activated by the TAP to take snapshot samples of the data appearing at the device pins or to perform a self test on the boundary-test cells. Activating the TAP in normal mode does not affect the functional operation of the SCOPETMoctal bus transceivers.

Data flow is controlled by the direction-control (DIR) and output-enable () inputs. Data transmission is allowed from the A bus to the B bus or from the B bus to the A bus, depending on the logic level at DIR. The output-enable () input can be used to disable the device so that the buses are effectively isolated.

Documents

Technical documentation and resources

SN74ABT8245DW

Deep-Dive with AI

SN74ABT8245DW

Deep-Dive with AI

Technical Specifications

SN74ABT8245 Series

Pricing

Description

SN74ABT8245 Series

Documents

LASP Demo Board User's Guide

Live Insertion

LOGIC Pocket Data Book (Rev. B)

Family of Curves Demonstrating Output Skews for Advanced BiCMOS Devices (Rev. A)

Understanding and Interpreting Standard-Logic Data Sheets (Rev. C)

Implications of Slow or Floating CMOS Inputs (Rev. E)

Designing With Logic (Rev. C)

TI IBIS File Creation, Validation, and Distribution Processes

Advanced Bus Interface Logic Selection Guide

Advanced BiCMOS Technology (ABT) Logic Characterization Information (Rev. B)

Bus-Interface Devices With Output-Damping Resistors Or Reduced-Drive Outputs (Rev. A)

Selecting the Right Level Translation Solution (Rev. A)

Advanced BiCMOS Technology (ABT) Logic Enables Optimal System Design (Rev. A)

Input and Output Characteristics of Digital Integrated Circuits

Power-Up 3-State (PU3S) Circuits in TI Standard Logic Devices

Semiconductor Packing Material Electrostatic Discharge (ESD) Protection

Logic Guide (Rev. AB)

Programming CPLDs Via the 'LVT8986 LASP

Quad Flatpack No-Lead Logic Packages (Rev. D)

Understanding Advanced Bus-Interface Products Design Guide

Scan Test Devices With Octal Bus Transceivers datasheet (Rev. D)

SN74ABT8245 Series