
953002DFLF
ObsoletePROGRAMMABLE TIMING CONTROL HUB™ FOR NEXT GEN P4™ PROCESSOR
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953002DFLF
ObsoletePROGRAMMABLE TIMING CONTROL HUB™ FOR NEXT GEN P4™ PROCESSOR
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Technical Specifications
Parameters and characteristics for this part
| Specification | 953002DFLF |
|---|---|
| Differential - Input:Output | No/Yes |
| Frequency - Max [Max] | 444 MHz |
| Input | Crystal |
| Main Purpose | PCI Express (PCIe), Timing Control Hub™, Intel CPU |
| Mounting Type | Surface Mount |
| Number of Circuits | 1 |
| Operating Temperature [Max] | 70 °C |
| Operating Temperature [Min] | 0 °C |
| Output | Clock |
| Package / Case | 48-BSSOP |
| Package / Case [y] | 0.295 in |
| Package / Case [y] | 7.5 mm |
| PLL | True |
| Ratio - Input:Output | 1:21 |
| Supplier Device Package | 48-SSOP |
| Voltage - Supply [Max] | 3.465 V |
| Voltage - Supply [Min] | 3.135 V |
Pricing
Prices provided here are for design reference only. For realtime values and availability, please visit the distributors directly
| Distributor | Package | Quantity | $ | |
|---|---|---|---|---|
Description
General part information
953002D Series
953002 is a 56-pin clock chip for P4 type processors with PCI-Express. The 953002 is part of a whole new line of ICS clock generators and buffers called TCH™ (Timing Control Hub). This part incorporates ICS's newest clock technology which offers more robust features and functionality. Employing the use of a serially programmable I2C interface, this device can adjust the output clocks by configuring the frequency setting, the output divider ratios, selecting the ideal spread percentage, the output skew, the output strength, and enabling/disabling each individual output clock. M/N control can configure output frequency with resolution up to 0.1MHz increment.
Documents
Technical documentation and resources