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Technical Specifications
Parameters and characteristics for this part
| Specification | SN74AXC8T245RJWR |
|---|---|
| Current - Output High, Low [custom] | 12 mA |
| Current - Output High, Low [custom] | 12 mA |
| Logic Type | Translation Transceiver |
| Mounting Type | Surface Mount |
| Number of Bits per Element | 8 |
| Number of Elements | 1 |
| Operating Temperature [Max] | 125 °C |
| Operating Temperature [Min] | -40 °C |
| Output Type | Tri-State, Non-Inverted |
| Package / Case | 24-UFQFN |
| Supplier Device Package | 24-UQFN (4x2) |
| Voltage - Supply [Max] | 3.6 V |
| Voltage - Supply [Min] | 0.65 V |
Pricing
Prices provided here are for design reference only. For realtime values and availability, please visit the distributors directly
| Distributor | Package | Quantity | $ | |
|---|---|---|---|---|
| Digikey | Cut Tape (CT) | 1 | $ 1.50 | |
| 10 | $ 1.35 | |||
| 25 | $ 1.27 | |||
| 100 | $ 1.08 | |||
| 250 | $ 1.02 | |||
| 500 | $ 0.89 | |||
| 1000 | $ 0.74 | |||
| Digi-Reel® | 1 | $ 1.50 | ||
| 10 | $ 1.35 | |||
| 25 | $ 1.27 | |||
| 100 | $ 1.08 | |||
| 250 | $ 1.02 | |||
| 500 | $ 0.89 | |||
| 1000 | $ 0.74 | |||
| Tape & Reel (TR) | 3000 | $ 0.69 | ||
| 6000 | $ 0.66 | |||
| 15000 | $ 0.64 | |||
| Texas Instruments | LARGE T&R | 1 | $ 1.13 | |
| 100 | $ 0.87 | |||
| 250 | $ 0.64 | |||
| 1000 | $ 0.46 | |||
Description
General part information
SN74AXC8T245-Q1 Series
The SN74AXC8T245-Q1 AEC-Q100 qualified device is an 8-bit non-inverting bus transceiver that resolves voltage level mismatch between devices operating at the latest voltage nodes (0.7V, 0.8V, and 0.9V) and devices operating at industry standard voltage nodes (1.8V, 2.5V, and 3.3V) and vice versa.
The device operates by using two independent power-supply rails (VCCA and VCCB) that operate as low as 0.65V. Data pins A1 through A8 are designed to track VCCA, which accepts any supply voltage from 0.65V to 3.6V. Data pins B1 through B8 are designed to track VCCB, which accepts any supply voltage from 0.65V to 3.6V.
The SN74AXC8T245-Q1 device is designed for asynchronous communication between data buses. The device transmits data from the A bus to the B bus or from the B bus to the A bus, depending on the logic level of the direction-control inputs (DIR1 and DIR2). The output-enable (OE) input is used to disable the outputs so the buses are effectively isolated.
Documents
Technical documentation and resources