Specification	SN74ACT374DWR

Clock Frequency	160 MHz
Current - Output High, Low	24 mA
Current - Quiescent (Iq)	4 çA
Function	Standard
Input Capacitance	4.5 pF
Max Propagation Delay @ V, Max CL	8.5 ns
Mounting Type	Surface Mount
Number of Bits per Element	8
Number of Elements	1
Operating Temperature [Max]	85 °C
Operating Temperature [Min]	-40 °C
Output Type	Tri-State, Non-Inverted
Package / Case	20-SOIC
Package / Case [y]	0.295 in
Package / Case [y]	7.5 mm
Supplier Device Package	20-SOIC
Trigger Type	Positive Edge
Type	D-Type
Voltage - Supply [Max]	5.5 V
Voltage - Supply [Min]	4.5 V

CD74ACT374 Series

Octal D-Type Edge-Triggered Flip-Flops With 3-State Outputs

Part	Number of Bits per Element	Mounting Type	Input Capacitance	Clock Frequency	Supplier Device Package	Operating Temperature [Max]	Operating Temperature [Min]	Current - Output High, Low	Voltage - Supply [Min]	Voltage - Supply [Max]	Number of Elements	Function	Type	Current - Quiescent (Iq)	Trigger Type	Package / Case	Package / Case	Package / Case	Output Type	Max Propagation Delay @ V, Max CL	Operating Temperature [Max]	Operating Temperature [Min]	Package / Case [y]	Package / Case [x]	Package / Case [y]
Texas Instruments CD74ACT374E	8	Through Hole	10 pF	110 MHz	20-PDIP	125 °C	-55 °C	24 mA	4.5 V	5.5 V	1	Standard	D-Type	8 ÁA	Positive Edge	20-DIP	7.62 mm	0.3 in	Non-Inverted Tri-State
Texas Instruments SN74ACT374PWR	8	Surface Mount	4.5 pF	160 MHz	20-TSSOP			24 mA	4.5 V	5.5 V	1	Standard	D-Type	4 çA	Positive Edge	20-TSSOP			Non-Inverted Tri-State	10 ns	85 °C	-40 °C	4.4 mm	0.173 in
Texas Instruments SN74ACT374NSR	8	Surface Mount	4.5 pF	160 MHz	20-SO			24 mA	4.5 V	5.5 V	1	Standard	D-Type	4 çA	Positive Edge	20-SOIC	5.3 mm	0.209 "	Non-Inverted Tri-State	10 ns	85 °C	-40 °C
Texas Instruments CD74ACT374M96	8	Surface Mount	10 pF	110 MHz	20-SOIC	125 °C	-55 °C	24 mA	4.5 V	5.5 V	1	Standard	D-Type	8 ÁA	Positive Edge	20-SOIC			Non-Inverted Tri-State				0.295 in		7.5 mm
Texas Instruments CD74ACT374M	8	Surface Mount	10 pF	110 MHz	20-SOIC	125 °C	-55 °C	24 mA	4.5 V	5.5 V	1	Standard	D-Type	8 ÁA	Positive Edge	20-SOIC			Non-Inverted Tri-State				0.295 in		7.5 mm
Texas Instruments SN74ACT374DWR	8	Surface Mount	4.5 pF	160 MHz	20-SOIC			24 mA	4.5 V	5.5 V	1	Standard	D-Type	4 çA	Positive Edge	20-SOIC			Non-Inverted Tri-State	8.5 ns	85 °C	-40 °C	0.295 in		7.5 mm
Texas Instruments SN74ACT374DBR	8	Surface Mount	4.5 pF	160 MHz	20-SSOP			24 mA	4.5 V	5.5 V	1	Standard	D-Type	4 çA	Positive Edge	20-SSOP			Non-Inverted Tri-State	8.5 ns	85 °C	-40 °C
Texas Instruments SN74ACT374DWE4	8	Surface Mount	4.5 pF	160 MHz	20-SOIC			24 mA	4.5 V	5.5 V	1	Standard	D-Type	4 çA	Positive Edge	20-SOIC			Non-Inverted Tri-State	10 ns	85 °C	-40 °C	0.295 in		7.5 mm

Pricing

Prices provided here are for design reference only. For realtime values and availability, please visit the distributors directly

Distributor	Package	Quantity	$

Digikey	Cut Tape (CT)	1	$ 0.92
		10	$ 0.82
		25	$ 0.78
		100	$ 0.64
		250	$ 0.60
		500	$ 0.53
		1000	$ 0.42
	Digi-Reel®	1	$ 0.92
		10	$ 0.82
		25	$ 0.78
		100	$ 0.64
		250	$ 0.60
		500	$ 0.53
		1000	$ 0.42
	Tape & Reel (TR)	2000	$ 0.39
		6000	$ 0.37
		10000	$ 0.36
Texas Instruments	LARGE T&R	1	$ 0.74
		100	$ 0.57
		250	$ 0.42
		1000	$ 0.30

Description

General part information

CD74ACT374 Series

These 8-bit flip-flops feature 3-state outputs designed specifically for driving highly capacitive or relatively low-impedance loads. The devices are particularly suitable for implementing buffer registers, I/O ports, bidirectional bus drivers, and working registers.

Documents

Technical documentation and resources

SNx4ACT374 Octal D-Type Edge-Triggered Flip-Flops with 3-State Outputs datasheet (Rev. H)

Data sheet

SN74ACT374DWR

Deep-Dive with AI

SN74ACT374DWR

Deep-Dive with AI

Technical Specifications

CD74ACT374 Series

Pricing

Description

CD74ACT374 Series

Documents

Selecting the Right Level Translation Solution (Rev. A)

Designing With Logic (Rev. C)

TI IBIS File Creation, Validation, and Distribution Processes

Power-Up Behavior of Clocked Devices (Rev. B)

Using High Speed CMOS and Advanced CMOS in Systems With Multiple Vcc

LOGIC Pocket Data Book (Rev. B)

Implications of Slow or Floating CMOS Inputs (Rev. E)

CMOS Power Consumption and CPD Calculation (Rev. B)

Logic Guide (Rev. AB)

Understanding and Interpreting Standard-Logic Data Sheets (Rev. C)

Semiconductor Packing Material Electrostatic Discharge (ESD) Protection

SNx4ACT374 Octal D-Type Edge-Triggered Flip-Flops with 3-State Outputs datasheet (Rev. H)

CD74ACT374 Series