723632L12PF
ObsoleteIC FIFO SYNC 512X36X2 120TQFP
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723632L12PF
ObsoleteIC FIFO SYNC 512X36X2 120TQFP
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Technical Specifications
Parameters and characteristics for this part
| Specification | 723632L12PF |
|---|---|
| Access Time | 8 ns |
| Bus Directional | Bi-Directional |
| Current - Supply (Max) [Max] | 400 mA |
| Data Rate | 83 MHz |
| Expansion Type | Width |
| Function | Synchronous |
| FWFT Support | True |
| Mounting Type | Surface Mount |
| Operating Temperature [Max] | 70 °C |
| Operating Temperature [Min] | 0 °C |
| Package / Case | 120-LQFP |
| Programmable Flags Support | True |
| Retransmit Capability | False |
| Supplier Device Package | 120-TQFP (14x14) |
| Voltage - Supply [Max] | 5.5 V |
| Voltage - Supply [Min] | 4.5 V |
723632 Series
512 x 36 x 2 SyncBiFIFO, 5.0V
| Part | Operating Temperature [Max] | Operating Temperature [Min] | Bus Directional | Retransmit Capability | Current - Supply (Max) [Max] | Function | Voltage - Supply [Min] | Voltage - Supply [Max] | Supplier Device Package | Data Rate | Programmable Flags Support | Access Time | Mounting Type | FWFT Support | Package / Case | Expansion Type |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
Renesas Electronics Corporation | 70 °C | 0 °C | Bi-Directional | 400 mA | Synchronous | 4.5 V | 5.5 V | 120-TQFP (14x14) | 83 MHz | 8 ns | Surface Mount | 120-LQFP | Width | |||
 Renesas Electronics Corporation | 70 °C | 0 °C | Bi-Directional | 400 mA | Synchronous | 4.5 V | 5.5 V | 120-TQFP (14x14) | 66.7 MHz | 10 ns | Surface Mount | 120-LQFP | Width |
Pricing
Prices provided here are for design reference only. For realtime values and availability, please visit the distributors directly
| Distributor | Package | Quantity | $ | |
|---|---|---|---|---|
Description
General part information
723632 Series
The 723632 is a monolithic Bidirectional SyncFIFO (clocked) memory. Two independent 512 x 36 dual-port SRAM FIFOs on board each chip buffer data in opposite directions. Communication between each port may bypass the FIFOs via two 36-bit mailbox registers. The enables for each port are arranged to provide a simple bidirectional interface between microprocessors and/or buses with synchronous control.
Documents
Technical documentation and resources