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Technical Specifications
Parameters and characteristics for this part
| Specification | 844003AGLF |
|---|---|
| Differential - Input:Output | No/Yes |
| Divider/Multiplier | Yes/No |
| Input | Crystal |
| Mounting Type | Surface Mount |
| Number of Circuits | 1 |
| Operating Temperature [Max] | 70 °C |
| Operating Temperature [Min] | 0 °C |
| Output | LVDS |
| Package / Case | 24-TSSOP |
| Package / Case | 0.173 in, 4.4 mm |
| PLL | Yes with Bypass |
| Ratio - Input:Output [custom] | 1:3 |
| Supplier Device Package | 24-TSSOP |
| Type | Frequency Synthesizer |
| Voltage - Supply [Max] | 3.465 V |
| Voltage - Supply [Min] | 3.135 V |
Pricing
Prices provided here are for design reference only. For realtime values and availability, please visit the distributors directly
| Distributor | Package | Quantity | $ | |
|---|---|---|---|---|
Description
General part information
844003I-04 Series
The 844003I-04 is a 3 differential output LVDS synthesizer designed to generate Ethernet reference clock frequencies. Using a 19.44MHz, 20MHz or 25MHz, 18pF parallel resonant crystal, the following frequencies can be generated based on the settings of four frequency select pins (DIV_SELA[1:0], DIV_SELB[1:0]): 625MHz, 622.08MHz, 312.5MHz, 250MHz, 156.25MHz, 125MHz and 100MHz. The 844003I-04 has two output banks, Bank A with one differential LVDS output pair and Bank B with two differential LVDS output pairs. The two banks have their own dedicated frequency select pins and can be independently set for the frequencies mentioned above. The 844003I-04 uses our third generation low phase noise VCO technology and can achieve 1ps or lower typical rms phase jitter, easily meeting Ethernet jitter requirements. The 844003I-04 is packaged in a 32-pin VFQFN package.
Documents
Technical documentation and resources