SN74AS74ANSR
ActiveDUAL POSITIVE-EDGE-TRIGGERED D-TYPE FLIP-FLOPS WITH PRESET AND CLEAR
Deep-Dive with AI
Search across all available documentation for this part.
SN74AS74ANSR
ActiveDUAL POSITIVE-EDGE-TRIGGERED D-TYPE FLIP-FLOPS WITH PRESET AND CLEAR
Deep-Dive with AI
Technical Specifications
Parameters and characteristics for this part
| Specification | SN74AS74ANSR |
|---|---|
| Clock Frequency | 105 MHz |
| Current - Output High, Low [custom] | 20 mA |
| Current - Output High, Low [custom] | 2 mA |
| Current - Quiescent (Iq) | 16 mA |
| Function | Reset, Set(Preset) |
| Max Propagation Delay @ V, Max CL | 9 ns |
| Mounting Type | Surface Mount |
| Number of Bits per Element | 1 |
| Number of Elements | 2 |
| Operating Temperature [Max] | 70 °C |
| Operating Temperature [Min] | 0 °C |
| Output Type | Complementary |
| Package / Case | 14-SOIC |
| Package / Case [x] | 0.209 " |
| Package / Case [y] | 5.3 mm |
| Supplier Device Package | 14-SO |
| Trigger Type | Positive Edge |
| Type | D-Type |
| Voltage - Supply [Max] | 5.5 V |
| Voltage - Supply [Min] | 4.5 V |
Pricing
Prices provided here are for design reference only. For realtime values and availability, please visit the distributors directly
| Distributor | Package | Quantity | $ | |
|---|---|---|---|---|
| Digikey | Cut Tape (CT) | 1 | $ 1.55 | |
| 10 | $ 1.39 | |||
| 25 | $ 1.31 | |||
| 100 | $ 1.12 | |||
| 250 | $ 1.05 | |||
| 500 | $ 0.92 | |||
| 1000 | $ 0.76 | |||
| Digi-Reel® | 1 | $ 1.55 | ||
| 10 | $ 1.39 | |||
| 25 | $ 1.31 | |||
| 100 | $ 1.12 | |||
| 250 | $ 1.05 | |||
| 500 | $ 0.92 | |||
| 1000 | $ 0.76 | |||
| Tape & Reel (TR) | 2000 | $ 0.71 | ||
| 4000 | $ 0.82 | |||
| 6000 | $ 0.68 | |||
| 10000 | $ 0.66 | |||
| Texas Instruments | LARGE T&R | 1 | $ 1.47 | |
| 100 | $ 1.13 | |||
| 250 | $ 0.83 | |||
| 1000 | $ 0.60 | |||
Description
General part information
SN74AS74A Series
These devices contain two independent positive-edge-triggered D-type flip-flops. A low level at the preset () or clear () inputs sets or resets the outputs regardless of the levels of the other inputs. Whenandare inactive (high), data at the data (D) input meeting the setup-time requirements are transferred to the outputs on the positive-going edge of the clock (CLK) pulse. Clock triggering occurs at a voltage level and is not directly related to the rise time of CLK. Following the hold-time interval, data at the D input can be changed without affecting the levels at the outputs.
The SN54ALS74A and SN54AS74A are characterized for operation over the full military temperature range of -55°C to 125°C. The SN74ALS74A and SN74AS74A are characterized for operation from 0°C to 70°C.
These devices contain two independent positive-edge-triggered D-type flip-flops. A low level at the preset () or clear () inputs sets or resets the outputs regardless of the levels of the other inputs. Whenandare inactive (high), data at the data (D) input meeting the setup-time requirements are transferred to the outputs on the positive-going edge of the clock (CLK) pulse. Clock triggering occurs at a voltage level and is not directly related to the rise time of CLK. Following the hold-time interval, data at the D input can be changed without affecting the levels at the outputs.
Documents
Technical documentation and resources
