Specification	SN74LS92NSR

Count Rate	42 MHz
Direction	Up
Logic Type	Divide-by-12
Mounting Type	Surface Mount
Number of Bits per Element	4
Number of Elements	1
Operating Temperature [Max]	70 °C
Operating Temperature [Min]	0 °C
Package / Case	14-SOIC
Package / Case [x]	0.209 "
Package / Case [y]	5.3 mm
Reset	Synchronous
Supplier Device Package	14-SO
Trigger Type	Positive Edge
Voltage - Supply [Max]	5.25 V
Voltage - Supply [Min]	4.75 V

SN74LS92 Series

Divide-By-Twelve Counter

Part	Direction	Package / Case [x]	Package / Case	Package / Case [y]	Count Rate	Reset	Number of Elements	Trigger Type	Mounting Type	Voltage - Supply [Min]	Voltage - Supply [Max]	Number of Bits per Element	Logic Type	Supplier Device Package	Operating Temperature [Max]	Operating Temperature [Min]
Texas Instruments SN74LS92NSR	Up	0.209 "	14-SOIC	5.3 mm	42 MHz	Synchronous	1	Positive Edge	Surface Mount	4.75 V	5.25 V	4	Divide-by-12	14-SO	70 °C	0 °C
Texas Instruments SN74LS92NS
Texas Instruments SN74LS92N	Up	0.3 "	14-DIP	7.62 mm	42 MHz	Synchronous	1	Positive Edge	Through Hole	4.75 V	5.25 V	4	Divide-by-12		70 °C	0 °C
Texas Instruments SN74LS92DR	Up	0.154 in	14-SOIC	3.9 mm	42 MHz	Synchronous	1	Positive Edge	Surface Mount	4.75 V	5.25 V	4	Divide-by-12		70 °C	0 °C

Pricing

Prices provided here are for design reference only. For realtime values and availability, please visit the distributors directly

Distributor	Package	Quantity	$

Digikey	Cut Tape (CT)	1	$ 3.41
		10	$ 3.06
		25	$ 2.89
		100	$ 2.51
		250	$ 2.38
		500	$ 2.13
		1000	$ 1.80
	Digi-Reel®	1	$ 3.41
		10	$ 3.06
		25	$ 2.89
		100	$ 2.51
		250	$ 2.38
		500	$ 2.13
		1000	$ 1.80
	Tape & Reel (TR)	2000	$ 1.71
		6000	$ 1.65
Texas Instruments	LARGE T&R	1	$ 2.96
		100	$ 2.59
		250	$ 1.82
		1000	$ 1.46

Description

General part information

SN74LS92 Series

Each of these monolithic counters contains four master-slave flip-flops and additional gating to provide a divide-by-two counter and a three-stage binary counter for which the count cycle length is divide-by-five for the '90A and 'LS90, divide-by-six for the '92A and 'LS92, and the divide-by eight for the '93A and 'LS93.

All of these counters have a gated zero reset and the '90A and 'LS90 also have gated set-to-nine inputs for use in BCD nine's complement applications.

To use their maximum count length (decade, divide-by-twelve, or four-bit binary) of these counters, the CKB input is connected to the QAoutput. The input count pulses are applied to CKA input and the outputs are as described in the appropriate function table. A symmetrical divide-by-ten count can be obtained from the '90A or 'LS90 counters by connecting the QDoutput to the CKA input and applying the input count to the CKB input which gives a divide-by-ten square wave at output QA.

Documents

Technical documentation and resources

Decade, Divide-by-Twelve And Binary Counters datasheet (Rev. A)

Data sheet