ADS8900BEVM-PDK
ActiveADS8900B ADC DEMONSTRATION KIT 1MSPS GRAPHICAL USER INTERFACE IDE
Deep-Dive with AI
Search across all available documentation for this part.
ADS8900BEVM-PDK
ActiveADS8900B ADC DEMONSTRATION KIT 1MSPS GRAPHICAL USER INTERFACE IDE
Deep-Dive with AI
Technical Specifications
Parameters and characteristics for this part
| Specification | ADS8900BEVM-PDK |
|---|---|
| Data Interface | SPI, Serial |
| Input Range | ±VREF |
| Number of A/D Converters | 1 |
| Number of Bits | 20 |
| Power (Typ) @ Conditions | 21 mW |
| Sampling Rate (Per Second) | 1 M |
| Supplied Contents | Board(s) |
| Utilized IC / Part | ADS8900B |
Pricing
Prices provided here are for design reference only. For realtime values and availability, please visit the distributors directly
| Distributor | Package | Quantity | $ | |
|---|---|---|---|---|
| Digikey | Bulk | 1 | $ 299.99 | |
Description
General part information
ADS8900B Series
The ADS8900B, ADS8902B, and ADS8904B (ADS890xB) belong to a family of pin-to-pin compatible, high-speed, single-channel, high-precision, 20-bit successive-approximation-register (SAR) analog-to-digital converters (ADCs) with an integrated reference buffer and integrated low-dropout regulator (LDO). The device family includes the ADS891xB (18-bit) and ADS892xB (16-bit) resolution variants.
The ADS89xxB boosts analog performance while maintaining high-resolution data transfer by using TI’s Enhanced-SPI feature. Enhanced-SPI enables ADS89xxB in achieving high throughput at lower clock speeds, there by simplifying the board layout and lowering system cost. Enhanced-SPI also simplifies the host’s clocking-in of data there by making it ideal for applications involving FPGAs, DSPs. ADS89xxB is compatible with standard SPI Interface.
The ADS89xxB has an internal data parity feature which can be appended to the ADC data output. ADC data validation by the host, using parity bits, improves system reliability.
Documents
Technical documentation and resources
No documents available
