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16 SOIC
Integrated Circuits (ICs)

SN74LS592D

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Texas Instruments

COUNTER SINGLE 8-BIT BINARY UP 16-PIN SOIC TUBE

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16 SOIC
Integrated Circuits (ICs)

SN74LS592D

Active
Texas Instruments

COUNTER SINGLE 8-BIT BINARY UP 16-PIN SOIC TUBE

Deep-Dive with AI

DocumentsDatasheet

Technical Specifications

Parameters and characteristics for this part

SpecificationSN74LS592D
Count Rate35 MHz
DirectionUp
Logic TypeBinary Counter
Mounting TypeSurface Mount
Number of Bits per Element8
Number of Elements1
Operating Temperature [Max]70 °C
Operating Temperature [Min]0 °C
Package / Case16-SOIC
Package / Case [x]0.154 in
Package / Case [y]3.9 mm
Supplier Device Package16-SOIC
Trigger TypePositive Edge
Voltage - Supply [Max]5.25 V
Voltage - Supply [Min]4.75 V

Pricing

Prices provided here are for design reference only. For realtime values and availability, please visit the distributors directly

DistributorPackageQuantity$
DigikeyTube 1$ 12.17
10$ 11.19
40$ 10.73
120$ 9.45
280$ 8.99
520$ 8.41
1000$ 7.71
Texas InstrumentsTUBE 1$ 10.96
100$ 9.57
250$ 7.38
1000$ 6.60

Description

General part information

SN74LS592 Series

The 'LS592 comes in a 16-pin package and consists of a parallel input, 8-bit storage register feeding an 8-bit binary counter. Both the register and the counter have individual positive-edge-triggered clocks. In addition, the counter has direct load and clear functions. A low-going RCO\ pulse will be obtained when the counter reaches the hex word FF. Expansion is easily accomplished for two stages by connecting RCO\ of the first stage to CCKEN\ of the second stage. Cascading for larger count chains can be accomplished by connecting RCO\ of each stage to CCK of the following stage.

The 'LS593 comes in a 20-pin package and has all the features of the 'LS592 plus 3-state I/O, which provides parallel counter outputs. The tables below show the operation of the enable (CCKEN, CCKEN\) inputs. A register clock enable (RCKEN\) is also provided.

The 'LS592 comes in a 16-pin package and consists of a parallel input, 8-bit storage register feeding an 8-bit binary counter. Both the register and the counter have individual positive-edge-triggered clocks. In addition, the counter has direct load and clear functions. A low-going RCO\ pulse will be obtained when the counter reaches the hex word FF. Expansion is easily accomplished for two stages by connecting RCO\ of the first stage to CCKEN\ of the second stage. Cascading for larger count chains can be accomplished by connecting RCO\ of each stage to CCK of the following stage.

Documents

Technical documentation and resources