Integrated Circuits (ICs)

SN74ALVCH162374DLR

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16-BIT EDGE-TRIGGERED D-TYPE FLIP-FLOP WITH 3-STATE OUTPUTS

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Search across all available documentation for this part.

DocumentsBenefits & Issues of Migrating 5-V and 3.3-V Logic to Lower-Voltage Supplies (Rev. A)Bus-Interface Devices With Output-Damping Resistors Or Reduced-Drive Outputs (Rev. A)+18

Integrated Circuits (ICs)

SN74ALVCH162374DLR

Active

Texas Instruments

16-BIT EDGE-TRIGGERED D-TYPE FLIP-FLOP WITH 3-STATE OUTPUTS

Deep-Dive with AI

DocumentsBenefits & Issues of Migrating 5-V and 3.3-V Logic to Lower-Voltage Supplies (Rev. A)Bus-Interface Devices With Output-Damping Resistors Or Reduced-Drive Outputs (Rev. A)+18

Specifications Series Pricing Description Documents

Technical Specifications

Parameters and characteristics for this part

Specification	SN74ALVCH162374DLR

Clock Frequency	150 MHz
Current - Output High, Low [custom]	12 mA
Current - Output High, Low [custom]	12 mA
Function	Standard
Input Capacitance	3 pF
Max Propagation Delay @ V, Max CL	4.6 ns
Mounting Type	Surface Mount
Number of Bits per Element	8
Number of Elements	2
Operating Temperature [Max]	85 °C
Operating Temperature [Min]	-40 °C
Output Type	Tri-State, Non-Inverted
Package / Case	48-BSSOP
Package / Case [y]	0.295 in
Package / Case [y]	7.5 mm
Supplier Device Package	48-SSOP
Trigger Type	Positive Edge
Type	D-Type
Voltage - Supply [Max]	3.6 V
Voltage - Supply [Min]	1.65 V

SN74ALVCH162374 Series

16-Bit Edge-Triggered D-Type Flip-Flop With 3-State Outputs

Part	Trigger Type	Output Type	Mounting Type	Current - Output High, Low [custom]	Current - Output High, Low [custom]	Voltage - Supply [Min]	Voltage - Supply [Max]	Input Capacitance	Function	Package / Case	Package / Case	Package / Case [custom]	Supplier Device Package	Number of Elements	Number of Bits per Element	Type	Operating Temperature [Max]	Operating Temperature [Min]	Max Propagation Delay @ V, Max CL	Clock Frequency	Package / Case [y]	Package / Case [y]
Texas Instruments SN74ALVCH162374GR	Positive Edge	Non-Inverted Tri-State	Surface Mount	12 mA	12 mA	1.65 V	3.6 V	3 pF	Standard	48-TFSOP	0.24 in	6.1 mm	48-TSSOP	2	8	D-Type	85 °C	-40 °C	4.6 ns	150 MHz
Texas Instruments SN74ALVCH162374DL	Positive Edge	Non-Inverted Tri-State	Surface Mount	12 mA	12 mA	1.65 V	3.6 V	3 pF	Standard	48-BSSOP			48-SSOP	2	8	D-Type	85 °C	-40 °C	4.6 ns	150 MHz	0.295 in	7.5 mm
Texas Instruments SN74ALVCH162374DLR	Positive Edge	Non-Inverted Tri-State	Surface Mount	12 mA	12 mA	1.65 V	3.6 V	3 pF	Standard	48-BSSOP			48-SSOP	2	8	D-Type	85 °C	-40 °C	4.6 ns	150 MHz	0.295 in	7.5 mm

Pricing

Prices provided here are for design reference only. For realtime values and availability, please visit the distributors directly

Distributor	Package	Quantity	$

Digikey	Cut Tape (CT)	1	$ 2.05
	Digi-Reel®	1	$ 2.05
	Tape & Reel (TR)	1000	$ 1.01
		2000	$ 0.94
		5000	$ 0.90
		10000	$ 0.87
Texas Instruments	LARGE T&R	1	$ 1.54
		100	$ 1.27
		250	$ 0.91
		1000	$ 0.69

Description

General part information

SN74ALVCH162374 Series

This 16-bit edge-triggered D-type flip-flop is designed for 1.65-V to 3.6-V VCCoperation.

The SN74ALVCH162374 is particularly suitable for implementing buffer registers, I/O ports, bidirectional bus drivers, and working registers. It can be used as two 8-bit flip-flops or one 16-bit flip-flop. On the positive transition of the clock (CLK) input, the Q outputs of the flip-flop take on the logic levels set up at the data (D) inputs.

The output-enable (OE)\ input can be used to place the eight outputs in either a normal logic state (high or low logic levels) or a high-impedance state. In the high-impedance state, the outputs neither load nor drive the bus lines significantly. The high-impedance state and the increased drive provide the capability to drive bus lines without need for interface or pullup components. OE\ does not affect internal operations of the flip-flop. Old data can be retained or new data can be entered while the outputs are in the high-impedance state.

Documents

Technical documentation and resources

SN74ALVCH162374DLR

Deep-Dive with AI

SN74ALVCH162374DLR

Deep-Dive with AI

Technical Specifications

SN74ALVCH162374 Series

Pricing

Description

SN74ALVCH162374 Series

Documents

Benefits & Issues of Migrating 5-V and 3.3-V Logic to Lower-Voltage Supplies (Rev. A)

Bus-Interface Devices With Output-Damping Resistors Or Reduced-Drive Outputs (Rev. A)

Understanding and Interpreting Standard-Logic Data Sheets (Rev. C)

CMOS Power Consumption and CPD Calculation (Rev. B)

LOGIC Pocket Data Book (Rev. B)

An Overview of Bus-Hold Circuit and the Applications (Rev. B)

Standard Linear & Logic for PCs, Servers & Motherboards

Power-Up Behavior of Clocked Devices (Rev. B)

Input and Output Characteristics of Digital Integrated Circuits

Semiconductor Packing Material Electrostatic Discharge (ESD) Protection

SN74ALVCH162374 datasheet (Rev. F)

TI SN74ALVC16835 Component Specification Analysis for PC100

Migration From 3.3-V To 2.5-V Power Supplies For Logic Devices

Logic Solutions for PC-100 SDRAM Registered DIMMs (Rev. A)

Live Insertion

Logic Guide (Rev. AB)

Understanding Advanced Bus-Interface Products Design Guide

TI IBIS File Creation, Validation, and Distribution Processes

16-Bit Widebus Logic Families in 56-Ball, 0.65-mm Pitch Very Thin Fine-Pitch BGA (Rev. B)

ALVC Advanced Low-Voltage CMOS Including SSTL, HSTL, And ALB (Rev. B)

SN74ALVCH162374 Series