
MAX533BEEE+
Active2.7V, LOW-POWER, 8-BIT QUAD DAC WITH RAIL-TO-RAIL OUTPUT BUFFERS
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MAX533BEEE+
Active2.7V, LOW-POWER, 8-BIT QUAD DAC WITH RAIL-TO-RAIL OUTPUT BUFFERS
Technical Specifications
Parameters and characteristics for this part
| Specification | MAX533BEEE+ |
|---|---|
| Architecture | String DAC |
| Data Interface | SPI |
| Differential Output | False |
| INL/DNL (LSB) | 1 LSB, 2 LSB |
| Mounting Type | Surface Mount |
| Number of Bits | 8 |
| Number of D/A Converters | 4 |
| Operating Temperature [Max] | 85 °C |
| Operating Temperature [Min] | -40 C |
| Output Type | Voltage - Buffered |
| Package / Case | 16-SSOP |
| Package / Case [x] | 0.154 in |
| Package / Case [y] | 3.9 mm |
| Reference Type | External |
| Settling Time | 6 µs |
| Supplier Device Package | 16-QSOP |
| Voltage - Supply, Analog [Max] | 3.6 V |
| Voltage - Supply, Analog [Min] | 2.7 V |
| Voltage - Supply, Digital [Max] [custom] | 3.6 V |
| Voltage - Supply, Digital [Min] [custom] | 2.7 V |
Pricing
Prices provided here are for design reference only. For realtime values and availability, please visit the distributors directly
| Distributor | Package | Quantity | $ | |
|---|---|---|---|---|
| Digikey | N/A | 50 | $ 9.03 | |
| 400 | $ 9.03 | |||
| Tube | 1 | $ 9.47 | ||
| 10 | $ 8.56 | |||
| 25 | $ 8.16 | |||
| 100 | $ 7.08 | |||
Description
General part information
MAX533 Series
The MAX533 serial-input, voltage-output, 8-bit quad digital-to-analog converter (DAC) operates from a sin-gle +2.7V to +3.6V supply. Internal precision buffers swing rail to rail, and the reference input range includes both ground and the positive rail. The MAX533 features a 1µA shutdown mode.The serial interface is double buffered: a 12-bit input shift register is followed by four 8-bit buffer registers and four 8-bit DAC registers. The 12-bit serial word consists of eight data bits and four control bits (for DAC selection and special programming commands). Both the input and DAC registers can be updated indepen-dently or simultaneously with a single software com-mand. Two additional asynchronous control pins, active-low LDAC and active-low CLR, provide simultaneous updating or clearing of the input and DAC registers.The interface is compatible with SPI™, QSPI™ (CPOL = CPHA = 0 or CPOL = CPHA = 1), and Microwire™. A buffered data output allows daisy chaining of serial devices.In addition to 16-pin DIP and CERDIP packages, the MAX533 is available in a 16-pin QSOP that occupies the same area as an 8-pin SO.ApplicationsDigital Gain and Offset ControlPortable InstrumentationProgrammable AttenuatorsProgrammable Current Sources
Documents
Technical documentation and resources