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AD5361BCPZ
Integrated Circuits (ICs)

AD5361BCPZ

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Analog Devices Inc./Maxim Integrated

16-CHANNEL, 14-BIT, SERIAL INPUT, VOLTAGE-OUTPUT DAC

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AD5361BCPZ
Integrated Circuits (ICs)

AD5361BCPZ

Active
Analog Devices Inc./Maxim Integrated

16-CHANNEL, 14-BIT, SERIAL INPUT, VOLTAGE-OUTPUT DAC

Technical Specifications

Parameters and characteristics for this part

SpecificationAD5361BCPZ
ArchitectureString DAC
Data InterfaceDSP, SPI
Differential OutputNo
DNL (Max) (LSB)1 LSB
INL (Max) (LSB)1 LSB
Mounting TypeSurface Mount
Number of Bits14 bits
Number of D/A Converters16 count
Operating Temperature (Max)85 °C
Operating Temperature (Min)-40 °C
Output TypeVoltage - Buffered
Package / Case56-VFQFN Exposed Pad, CSP
Package Length8 mm
Package Name56-LFCSP-VQ
Package Width8 mm
Reference TypeExternal
Settling Time30 µs
Voltage - Supply, Analog (Range 1 Max)16.5 V
Voltage - Supply, Analog (Range 1 Min)8 V
Voltage - Supply, Analog (Range 2 Max)16.5 V
Voltage - Supply, Analog (Range 2 Min)-4.5 V
Voltage - Supply, Digital (Max)5.5 V
Voltage - Supply, Digital (Min)2.5 V

Pricing

Prices provided here are for design reference only. For realtime values and availability, please visit the distributors directly

DistributorPackageQuantity$Updated
DigikeyTray 13$ 60.10<1d

CAD

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Description

General part information

AD5361 Series

TheAD5360/ AD5361 contain 16, 16-/14-bit DACs in a single 52-lead LQFP package. It provides buffered voltage outputs with a span four times the reference voltage. The gain and offset of each DAC can be independently trimmed to remove errors. For even greater flexibility, the device is divided into two groups of eight DACs, and the output range of each group can be independently adjusted by an offset DAC.The AD5360 / AD5361 offer guaranteed operation over a wide supply range with VSSfrom −4.5 V to −16.5 V and VDDfrom +8 V to +16.5 V. The output amplifier headroom requirement is 1.4 V operating with a load current of 1 mA.The AD5360 / AD5361 have a high speed 4-wire serial interface, which is compatible with SPI, QSPI™, MICROWIRE™, and DSP interface standards and can handle clock speeds of up to 50 MHz. All the outputs can be updated simultaneously by taking theLDACinput low. Each channel has a programmable gain and an offset adjust register.Each DAC output is amplified and buffered on-chip with respect to an external SIGGND input. The DAC outputs can also be switched to SIGGND via theCLRpin.APPLICATIONSInstrumentationIndustrial control systemsLevel setting in automatic test equipment (ATE)Variable optical attenuators (VOA)Optical line cards