SN65MLVD2DRBR
ActiveLVDS RECEIVER 250MBPS 8-PIN VSON EP T/R
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SN65MLVD2DRBR
ActiveLVDS RECEIVER 250MBPS 8-PIN VSON EP T/R
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Technical Specifications
Parameters and characteristics for this part
| Specification | SN65MLVD2DRBR |
|---|---|
| Data Rate | 250 MBd |
| Mounting Type | Surface Mount |
| Number of Drivers/Receivers [custom] | 1 |
| Number of Drivers/Receivers [custom] | 0 |
| Operating Temperature [Max] | 85 °C |
| Operating Temperature [Min] | -40 °C |
| Package / Case | 8-VDFN Exposed Pad |
| Protocol | Multipoint, LVDS |
| Receiver Hysteresis | 25 mV |
| Supplier Device Package | 8-SON (3x3) |
| Type | Receiver |
| Voltage - Supply [Max] | 3.6 V |
| Voltage - Supply [Min] | 3 V |
Pricing
Prices provided here are for design reference only. For realtime values and availability, please visit the distributors directly
| Distributor | Package | Quantity | $ | |
|---|---|---|---|---|
| Digikey | Cut Tape (CT) | 1 | $ 1.84 | |
| 10 | $ 1.65 | |||
| 25 | $ 1.56 | |||
| 100 | $ 1.33 | |||
| 250 | $ 1.25 | |||
| 500 | $ 1.09 | |||
| 1000 | $ 0.90 | |||
| Digi-Reel® | 1 | $ 1.84 | ||
| 10 | $ 1.65 | |||
| 25 | $ 1.56 | |||
| 100 | $ 1.33 | |||
| 250 | $ 1.25 | |||
| 500 | $ 1.09 | |||
| 1000 | $ 0.90 | |||
| Tape & Reel (TR) | 3000 | $ 0.84 | ||
| 6000 | $ 0.81 | |||
| Texas Instruments | LARGE T&R | 1 | $ 1.38 | |
| 100 | $ 1.14 | |||
| 250 | $ 0.82 | |||
| 1000 | $ 0.62 | |||
Description
General part information
SN65MLVD2 Series
The SN65MLVD2 and SN65MLVD3 are single-channel M-LVDS receivers. These devices are designed in full compliance with the TIA/EIA-899 (M-LVDS) standard, which are optimized to operate at signaling rates up to 250 Mbps. Each receiver channel is controlled by a receive enable (RE). WhenRE= low, the corresponding channel is enabled; whenRE= high, the corresponding channel is disabled.
The M-LVDS standard defines two types of receivers, designated as Type-1 and Type-2. Type-1 receivers (SN65MLVD2) have thresholds centered about zero with 25 mV of hysteresis to prevent output oscillations with loss of input; Type-2 receivers (SN65MLVD3) implement a failsafe by using an offset threshold. Receiver outputs are slew rate controlled to reduce EMI and crosstalk effects associated with large current surges.
The devices are characterized for operation from -40°C to 85°C.
Documents
Technical documentation and resources