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48-pin (PFB) package image
Integrated Circuits (ICs)

SRC4382IPFBR

Active
Texas Instruments

SAMPLE RATE CONVERTER 216KSPS 24BIT 48-PIN TQFP T/R

48-pin (PFB) package image
Integrated Circuits (ICs)

SRC4382IPFBR

Active
Texas Instruments

SAMPLE RATE CONVERTER 216KSPS 24BIT 48-PIN TQFP T/R

Technical Specifications

Parameters and characteristics for this part

SpecificationSRC4382IPFBR
ApplicationsDigital Audio Interfacing
FunctionSample Rate Converter
InterfaceI2C, SPI
Mounting TypeSurface Mount
Number of Channels [custom]2
Operating Temperature [Max]85 °C
Operating Temperature [Min]-40 °C
Package / Case48-TQFP
Specifications [Max]216 kHz
Specifications [Min]4 kHz
Supplier Device Package48-TQFP (7x7)
Voltage - Supply [Max]3.6 V
Voltage - Supply [Min]3 V

Pricing

Prices provided here are for design reference only. For realtime values and availability, please visit the distributors directly

DistributorPackageQuantity$
DigikeyCut Tape (CT) 1$ 13.55
10$ 12.45
25$ 11.94
100$ 10.52
250$ 10.00
500$ 9.36
Digi-Reel® 1$ 13.55
10$ 12.45
25$ 11.94
100$ 10.52
250$ 10.00
500$ 9.36
Tape & Reel (TR) 1000$ 7.99
Texas InstrumentsLARGE T&R 1$ 9.02
100$ 7.88
250$ 6.07
1000$ 5.43

Description

General part information

SRC4382 Series

The SRC4382 is a highly-integrated CMOS device designed for use in professional and broadcast digital audio systems. The SRC4382 combines a high-performance, two-channel, asynchronous sample rate converter (SRC) with a digital audio interface receiver (DIR) and transmitter (DIT), two audio serial ports, and flexible distribution logic for interconnection of the function block data and clocks.

The DIR and DIT are compatible with the AES3, S/PDIF, IEC 60958, and EIAJ CP-1201 interface standards. The audio serial ports, DIT, and SRC may be operated at sampling rates up to 216kHz. The DIR lock range includes sampling rates from 20kHz to 216kHz.

The SRC4382 is configured using on-chip control registers and data buffers, which are accessed through either a 4-wire serial peripheral interface (SPI) port, or a 2-wire Philips I2C bus interface. Status registers provide access to a variety of flag and error bits, which are derived from the various function blocks. An open drain interrupt output pin is provided, and is supported by flexible interrupt reporting and mask options via control register settings. A master reset input pin is provided for initialization by a host processor or supervisory functions.