Integrated Circuits (ICs)

CD4508BD3

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Texas Instruments

CMOS DUAL 4-BIT LATCH 24-CDIP SB

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Search across all available documentation for this part.

DocumentsCD4508B TYPES datasheet (Rev. B)

Integrated Circuits (ICs)

CD4508BD3

Active

Texas Instruments

CMOS DUAL 4-BIT LATCH 24-CDIP SB

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DocumentsCD4508B TYPES datasheet (Rev. B)

Specifications Series Pricing Description Documents

Technical Specifications

Parameters and characteristics for this part

Specification	CD4508BD3

Circuit	4:4
Current - Output High, Low [custom]	6.8 mA
Current - Output High, Low [custom]	6.8 mA
Delay Time - Propagation	50 ns
Independent Circuits	2
Logic Type	D-Type Transparent Latch
Mounting Type	Through Hole
Operating Temperature [Max]	125 °C
Operating Temperature [Min]	-55 °C
Output Type	Tri-State, Non-Inverted
Package / Case	0.3 in, 7.62 mm
Package / Case	24-CDIP
Supplier Device Package	24-CDIP
Voltage - Supply [Max]	18 V
Voltage - Supply [Min]	3 V

CD4508B-MIL Series

CMOS Dual 4-Bit Latch

Part	Current - Output High, Low [custom]	Current - Output High, Low [custom]	Logic Type	Mounting Type	Voltage - Supply [Max]	Voltage - Supply [Min]	Package / Case	Package / Case	Circuit	Output Type	Delay Time - Propagation	Independent Circuits	Supplier Device Package	Operating Temperature [Min]	Operating Temperature [Max]	Package / Case
Texas Instruments CD4508BD3	6.8 mA	6.8 mA	D-Type Transparent Latch	Through Hole	18 V	3 V	0.3 in 7.62 mm	24-CDIP	4:4	Non-Inverted Tri-State	50 ns	2	24-CDIP	-55 °C	125 °C
Texas Instruments CD4508BF3A	6.8 mA	6.8 mA	D-Type Transparent Latch	Through Hole	18 V	3 V	0.6 in	24-CDIP	4:4	Non-Inverted Tri-State	50 ns	2	24-CDIP	-55 °C	125 °C	15.24 mm

Pricing

Prices provided here are for design reference only. For realtime values and availability, please visit the distributors directly

Distributor	Package	Quantity	$

Texas Instruments	TUBE	1	$ 91.28
		100	$ 79.73
		250	$ 61.47
		1000	$ 54.99

Description

General part information

CD4508B-MIL Series

CD4508B dual 4-bit latch contains two identical 4-bit latches with separate STROBE, RESET, and OUTPUT DISABLE control. With the STROBE line in the high state, the data on the "D" inputs appear at the corresponding "Q" outputs provided the DISABLE line is in the low state. Changing the STROBE line to the low state locks the data into the latch. A high on the reset line forces the outputs to a low level regardless of the state of the STROBE input. The outputs are forced to the high-impedance state for bus line applications by a high level on the DISABLE input.

The CD4508B types are supplied in 24-lead hermetic dual-in-line ceramic packages (F3A suffix), 24-lead dual-in-line plastic packages (E suffix), 24-lead small-outline packages (M, M96, and NSR suffixes), and 24-lead thin shrink small-outline packages (PW and PWR suffixes).

The CD4508B is similar to industry type MC14508.

Documents

Technical documentation and resources

CD4508B TYPES datasheet (Rev. B)

Data sheet