Specification	74HC73D,653

Clock Frequency	83 MHz
Current - Output High, Low [custom]	5.2 mA
Current - Output High, Low [custom]	5.2 mA
Current - Quiescent (Iq)	4 çA
Function	Reset
Input Capacitance	3.5 pF
Max Propagation Delay @ V, Max CL	27 ns
Mounting Type	Surface Mount
Number of Bits per Element	1
Number of Elements	2
Operating Temperature [Max]	125 °C
Operating Temperature [Min]	-40 °C
Output Type	Complementary
Package / Case	3.9 mm, 0.154 in
Package / Case	14-SOIC
Supplier Device Package	14-SO
Trigger Type	Negative Edge
Type	JK Type
Voltage - Supply [Max]	6 V
Voltage - Supply [Min]	2 V

74HC73D Series

Dual JK flip-flop with reset; negative-edge trigger

Part	Type	Voltage - Supply [Max]	Voltage - Supply [Min]	Operating Temperature [Max]	Operating Temperature [Min]	Number of Elements	Input Capacitance	Supplier Device Package	Trigger Type	Current - Output High, Low [custom]	Current - Output High, Low [custom]	Function	Mounting Type	Current - Quiescent (Iq)	Clock Frequency	Max Propagation Delay @ V, Max CL	Number of Bits per Element	Output Type	Package / Case	Package / Case
Nexperia USA Inc. 74HC73D,653	JK Type	6 V	2 V	125 °C	-40 °C	2	3.5 pF	14-SO	Negative Edge	5.2 mA	5.2 mA	Reset	Surface Mount	4 çA	83 MHz	27 ns	1	Complementary	0.154 in 3.9 mm	14-SOIC

Pricing

Prices provided here are for design reference only. For realtime values and availability, please visit the distributors directly

Distributor	Package	Quantity	$

Digikey	N/A	2500	$ 0.42

Description

General part information

74HC73D Series

The 74HC73 is a dual negative edge triggered JK flip-flop with individual J, K, clock (nCP) and reset (nR) inputs and complementary nQ and nQoutputs. The J and K inputs must be stable one set-up time prior to the HIGH-to-LOW clock transition for predictable operation. (nR) is asynchronous, when LOW it overrides the clock and data inputs, forcing the nQ output LOW and the nQoutput HIGH. Schmitt-trigger action in the clock input makes the circuit highly tolerant to slower clock rise and fall times. Inputs include clamp diodes. This enables the use of current limiting resistors to interface inputs to voltages in excess of VCC.