
MCIMX357DJQ5CR2
ActiveI.MX35 32-BIT MPU, ARM1136JF-S CORE, 532MHZ, MAPBGA 400/ REEL ROHS COMPLIANT: YES
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MCIMX357DJQ5CR2
ActiveI.MX35 32-BIT MPU, ARM1136JF-S CORE, 532MHZ, MAPBGA 400/ REEL ROHS COMPLIANT: YES
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Technical Specifications
Parameters and characteristics for this part
| Specification | MCIMX357DJQ5CR2 |
|---|---|
| Additional Interfaces | SAI, ASRC, SPI, I2C, SSI, I2S, UART, MMC/SDIO, ATA, CAN, 1-Wire |
| Co-Processors/DSP | VFP, IPU, Multimedia, GPU |
| Core Processor | ARM1136JF-S |
| Display & Interface Controllers | KPP, Keypad, LCD |
| Ethernet | 1 |
| Ethernet [Max] | 100 Mbps |
| Ethernet [Min] | 10 Mbps |
| Graphics Acceleration | True |
| Mounting Type | Surface Mount |
| Number of Cores/Bus Width | 32 Bit, 1 Core |
| Operating Temperature [Max] | 70 °C |
| Operating Temperature [Min] | -20 °C |
| Package / Case | 400-LFBGA |
| RAM Controllers | DDR2, LPDDR |
| Security Features | Secure JTAG, Secure Fusebox, Tamper Detection |
| Speed | 532 MHz |
| Supplier Device Package | 400-LFBGA (17x17) |
| USB | USB 2.0 + PHY (2) |
| Voltage - I/O | 2 V, 3.3 V, 3 V, 2.5 V, 1.8 V, 2.7 V |
Pricing
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Description
General part information
MCIMX357 Series
Freescale's i.MX357 processor integrates an OpenVG 1.1 hardware accelerator to deliver smooth textural visuals. The integration of the LCD controller enables high resolution and high colour display. The Camera Interface (CMOS Sensor Interface) allows for video input acceptance, taking photos, streaming video, etc. To reduce BOM costs, it is packed with connectivity options including UARTs, SPIs, Ethernet, two Controller Area Network (CAN), two USB ports with integrated PHYs, three MMC/SD/SDIO ports, PATA, CE-ATA and the ability to connect to external wireless modules via a USB or SDIO port. Support for cost-effective memory options like DDR2 and multi-level cell NAND reduces system costs and provide the design engineer great flexibility. The i.MX357 is supported by companion Freescale power management ICs (PMIC), MC13892 and MMPF0100.ARM1136JF-S™532 MHz maximum speed128 KB Integrated SRAM16 KB I/D L1 Cache, 128 KB L2 cacheOpenVG 1.1 2.5D hardware acceleratorImage Processing Unit (IPU)LCD Controller10/100 EthernetMAC 2 x FlexCan modulesHS OTG + PHY, HS Host + PHY3 x UART, 2 x CSPI, 3 x I2C, 2 SSI/I2SP-ATA/CE-ATAOptimized for up to 24-bit-per-pixel WVGACMOS/CCD sensor interfaceVector Floating Point UniExternal memory interface: mSDRAM/SDRAM, mDDR/DDR2, NOR, SLC/MLC NAND3.3V general purpose I/O
Documents
Technical documentation and resources