Specification	ADS5204IPFBRQ1

Architecture	Pipelined
Configuration	PGA-S/H-ADC
Data Interface	Parallel
Features	Simultaneous Sampling, PGA
Grade	Automotive
Input Type	Single Ended, Differential
Mounting Type	Surface Mount
Number of A/D Converters	2
Number of Bits [custom]	10
Number of Inputs	2
Operating Temperature [Max]	85 °C
Operating Temperature [Min]	-40 °C
Package / Case	48-TQFP
Qualification	AEC-Q100
Ratio - S/H:ADC	1:1
Reference Type	External, Internal
Sampling Rate (Per Second)	40M
Supplier Device Package	48-TQFP (7x7)
Voltage - Supply, Analog [Max]	3.6 V
Voltage - Supply, Analog [Min]	3 V
Voltage - Supply, Digital [Max]	3.6 V
Voltage - Supply, Digital [Min]	3 V

ADS5204-Q1 Series

Dual-Channel, 10-Bit, 40-MSPS Analog-to-Digital Converter - Qualified for Automotive Applications

Part	Number of Inputs	Supplier Device Package	Sampling Rate (Per Second)	Operating Temperature [Max]	Operating Temperature [Min]	Ratio - S/H:ADC	Number of A/D Converters	Voltage - Supply, Digital [Max]	Voltage - Supply, Digital [Min]	Qualification	Reference Type	Number of Bits [custom]	Input Type	Features	Data Interface	Architecture	Configuration	Mounting Type	Grade	Package / Case	Voltage - Supply, Analog [Max]	Voltage - Supply, Analog [Min]	Voltage - Supply, Digital
Texas Instruments ADS5204IPFBRQ1	2	48-TQFP (7x7)	40M	85 °C	-40 °C	1:1	2	3.6 V	3 V	AEC-Q100	External Internal	10	Differential Single Ended	PGA Simultaneous Sampling	Parallel	Pipelined	PGA-S/H-ADC	Surface Mount	Automotive	48-TQFP	3.6 V	3 V
Texas Instruments ADS5204IPFBR	2	48-TQFP (7x7)	40M	85 °C	-40 °C	1:1	2				External Internal	10	Differential Single Ended	PGA Simultaneous Sampling	Parallel	Pipelined	PGA-S/H-ADC	Surface Mount		48-TQFP	3.6 V	0 V	3.3 V
Texas Instruments ADS5204IPFBRG4Q1	2	48-TQFP (7x7)	40M	85 °C	-40 °C	1:1	2			AEC-Q100	External Internal	10	Differential Single Ended	PGA Simultaneous Sampling	Parallel	Pipelined	PGA-S/H-ADC	Surface Mount	Automotive	48-TQFP	3.6 V	0 V	3.3 V
Texas Instruments ADS5204IPFB	2	48-TQFP (7x7)	40M	85 °C	-40 °C	1:1	2				External Internal	10	Differential Single Ended	PGA Simultaneous Sampling	Parallel	Pipelined	PGA-S/H-ADC	Surface Mount		48-TQFP	3.6 V	0 V	3.3 V

Pricing

Prices provided here are for design reference only. For realtime values and availability, please visit the distributors directly

Distributor	Package	Quantity	$

Texas Instruments	LARGE T&R	1	$ 29.82
		100	$ 26.50
		250	$ 21.79
		1000	$ 19.49

Description

General part information

ADS5204-Q1 Series

The ADS5204 is a dual 10-bit, 40 MSPS analog-to-digital converter (ADC). It simultaneously converts each analog input signal into a 10-bit, binary coded digital word up to a maximum sampling rate of 40 MSPS per channel. All digital inputs and outputs are 3.3-V TTL/CMOS compatible.

An innovative dual pipeline architecture implemented in a CMOS process and the 3.3-V supply results in very low power dissipation. In order to provide maximum flexibility, both top and bottom voltage references can be set from user-supplied voltages. Alternatively, if no external references are available, the on-chip internal references can be used. Both ADCs share a common reference to improve offset and gain matching. If external reference voltage levels are available, the internal references can be powered down independently from the rest of the chip, resulting in even greater power savings.

The ADS5204 also features dual, onboard programmable gain amplifiers (PGAs) that allow a setting of 0 dB to 18 dB to adjust the gain of each set of inputs in order to match the amplitude of the incoming signal.

Documents

Technical documentation and resources

Dual 10-Bit 40-MSPS Low-Power ADC With PGA datasheet (Rev. A)

Data sheet