CD54HC4060F3A
ActiveHIGH SPEED CMOS LOGIC 14-STAGE BINARY COUNTER WITH OSCILLATOR
Deep-Dive with AI
Search across all available documentation for this part.
CD54HC4060F3A
ActiveHIGH SPEED CMOS LOGIC 14-STAGE BINARY COUNTER WITH OSCILLATOR
Deep-Dive with AI
Technical Specifications
Parameters and characteristics for this part
| Specification | CD54HC4060F3A |
|---|---|
| Count Rate | 35 MHz |
| Direction | Up |
| Logic Type | Binary Counter |
| Mounting Type | Through Hole |
| Number of Bits per Element [custom] | 14 |
| Number of Elements | 1 |
| Operating Temperature [Max] | 125 °C |
| Operating Temperature [Min] | -55 °C |
| Package / Case | 7.62 mm, 0.3 in |
| Package / Case | 16-CDIP |
| Reset | Asynchronous |
| Supplier Device Package | 16-CDIP |
| Trigger Type | Negative Edge |
| Voltage - Supply [Max] | 6 V |
| Voltage - Supply [Min] | 2 V |
Pricing
Prices provided here are for design reference only. For realtime values and availability, please visit the distributors directly
| Distributor | Package | Quantity | $ | |
|---|---|---|---|---|
| Texas Instruments | TUBE | 1 | $ 56.78 | |
| 100 | $ 50.47 | |||
| 250 | $ 41.49 | |||
| 1000 | $ 37.11 | |||
Description
General part information
CD54HC4060 Series
The ’HC4060 and ’HCT4060 each consist of an oscillator section and 14 ripple-carry binary counter stages. The oscillator configuration allows design of either RC or crystal oscillator circuits. A Master Reset input is provided which resets the counter to the all-0’s state and disables the oscillator. A high level on the MR line accomplishes the reset function. All counter stages are master-slave flip-flops. The state of the counter is advanced one step in binary order on the negative transition ofO). All inputs and outputs are buffered. Schmitt trigger action on the input-pulse-line permits unlimited rise and fall times.
In order to achieve a symmetrical waveform in the oscillator section the HCT4060 input pulse switch points are the same as in the HC4060; only the MR input in the HCT4060 has TTL switching levels.
The ’HC4060 and ’HCT4060 each consist of an oscillator section and 14 ripple-carry binary counter stages. The oscillator configuration allows design of either RC or crystal oscillator circuits. A Master Reset input is provided which resets the counter to the all-0’s state and disables the oscillator. A high level on the MR line accomplishes the reset function. All counter stages are master-slave flip-flops. The state of the counter is advanced one step in binary order on the negative transition ofO). All inputs and outputs are buffered. Schmitt trigger action on the input-pulse-line permits unlimited rise and fall times.
Documents
Technical documentation and resources