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TLC6C5912QDWRQ1

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Texas Instruments

AUTOMOTIVE POWER LOGIC 12-BIT SHIFT REGISTER LED DRIVER

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SOIC (DW)
Integrated Circuits (ICs)

TLC6C5912QDWRQ1

Active
Texas Instruments

AUTOMOTIVE POWER LOGIC 12-BIT SHIFT REGISTER LED DRIVER

Technical Specifications

Parameters and characteristics for this part

SpecificationTLC6C5912QDWRQ1
Current - Output / Channel50 mA
GradeAutomotive
Internal Switch(s)True
Mounting TypeSurface Mount
Number of Outputs12
Operating Temperature [Max]150 °C
Operating Temperature [Min]-40 °C
Package / Case20-SOIC
Package / Case [y]0.295 in
Package / Case [y]7.5 mm
QualificationAEC-Q100
Supplier Device Package20-SOIC
TopologyShift Register
TypeLinear
Voltage - Output40 V
Voltage - Supply (Max)5.5 V
Voltage - Supply (Min) [Min]3 V

Pricing

Prices provided here are for design reference only. For realtime values and availability, please visit the distributors directly

DistributorPackageQuantity$
DigikeyCut Tape (CT) 1$ 1.61
10$ 1.45
25$ 1.36
100$ 1.16
250$ 1.09
500$ 0.95
1000$ 0.79
Digi-Reel® 1$ 1.61
10$ 1.45
25$ 1.36
100$ 1.16
250$ 1.09
500$ 0.95
1000$ 0.79
Tape & Reel (TR) 2000$ 0.68
Texas InstrumentsLARGE T&R 1$ 1.21
100$ 1.00
250$ 0.72
1000$ 0.54

Description

General part information

TLC6C5912-Q1 Series

The TLC6C5912-Q1 is a monolithic, medium-voltage, low-current power 12-bit shift register designed for use in systems that require relatively moderate load power, such as LEDs.

This device contains a 12-bit serial-in, parallel-out shift register that feeds a 12-bit D-type storage register. Data transfers through both the shift and storage registers on the rising edge of the shift-register clock (SRCK) and the register clock (RCK), respectively. The storage register transfers data to the output buffer when shift register clear (CLR) is high. A low onCLRclears all registers in the device. Holding the output enable (G) high holds all data in the output buffers low, and all drain outputs are off. HoldingGlow makes data from the storage register transparent to the output buffers.

When data in the output buffers is low, the DMOS transistor outputs are off. When data is high, the DMOS transistor outputs have sink-current capability. The serial output (SER OUT) clocks out of the device on the falling edge of SRCK to provide additional hold time for cascaded applications. This provides improved performance for applications where clock signals may be skewed, devices are not located near one another, or the system must tolerate electromagnetic interference. The device contains a built-in thermal shutdown protection.