74LVC1G04GV,125
ActiveINVERTER 1-ELEMENT CMOS 5-PIN TSOP T/R
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74LVC1G04GV,125
ActiveINVERTER 1-ELEMENT CMOS 5-PIN TSOP T/R
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Technical Specifications
Parameters and characteristics for this part
| Specification | 74LVC1G04GV,125 |
|---|---|
| Current - Output High, Low | 32 mA, 32 mA |
| Current - Quiescent (Max) [Max] | 4 µA |
| Input Logic Level - High [Max] | 3.85 V |
| Input Logic Level - High [Min] | 1.07 V |
| Input Logic Level - Low [Max] | 1.65 V |
| Input Logic Level - Low [Min] | 0.58 V |
| Logic Type | Inverter |
| Max Propagation Delay @ V, Max CL | 5 ns |
| Mounting Type | Surface Mount |
| Number of Circuits | 1 |
| Number of Inputs [custom] | 1 |
| Operating Temperature [Max] | 125 °C |
| Operating Temperature [Min] | -40 °C |
| Package / Case | SOT-753, SC-74A |
| Supplier Device Package | SC-74A |
| Voltage - Supply [Max] | 5.5 V |
| Voltage - Supply [Min] | 1.65 V |
Pricing
Prices provided here are for design reference only. For realtime values and availability, please visit the distributors directly
| Distributor | Package | Quantity | $ | |
|---|---|---|---|---|
| Digikey | N/A | 92052 | $ 0.16 | |
Description
General part information
74LVC1G04GV Series
The 74LVC1G04 is a single inverter. Inputs can be driven from either 3.3 V or 5 V devices. This feature allows the use of these devices as translators in mixed 3.3 V and 5 V environments. Schmitt-trigger action at all inputs makes the circuit tolerant of slower input rise and fall times. This device is fully specified for partial power down applications using IOFF. The IOFFcircuitry disables the output, preventing the potentially damaging backflow current through the device when it is powered down.
Documents
Technical documentation and resources