Specification	74LVC06APW,118

Current - Output High, Low	-
Current - Output High, Low	32 mA
Current - Quiescent (Max) [Max]	40 µA
Features	Open Drain
Input Logic Level - High [Max] [x]	2 V
Input Logic Level - High [Min] [x]	1.08 V
Input Logic Level - Low [Max]	0.8 V
Input Logic Level - Low [Min]	0.12 V
Logic Type	Inverter
Max Propagation Delay @ V, Max CL	2.5 ns
Mounting Type	Surface Mount
Number of Circuits	6
Number of Inputs [custom]	1
Operating Temperature [Max]	125 °C
Operating Temperature [Min]	-40 C
Package / Case	14-TSSOP
Package / Case [x]	0.173 ", 4.4 mm
Supplier Device Package	14-TSSOP
Voltage - Supply [Max]	5.5 V
Voltage - Supply [Min]	1.2 V

74LVC06APW Series

Hex inverter with open-drain outputs

Part	Number of Circuits	Mounting Type	Input Logic Level - Low [Min]	Input Logic Level - Low [Max]	Max Propagation Delay @ V, Max CL	Voltage - Supply [Min]	Voltage - Supply [Max]	Features	Current - Quiescent (Max) [Max]	Number of Inputs [custom]	Logic Type	Supplier Device Package	Current - Output High, Low	Current - Output High, Low	Input Logic Level - High [Max] [x]	Input Logic Level - High [Min] [x]	Package / Case [x]	Package / Case	Operating Temperature [Max]	Operating Temperature [Min]
Nexperia USA Inc. 74LVC06APW,118	6	Surface Mount	0.12 V	0.8 V	2.5 ns	1.2 V	5.5 V	Open Drain	40 µA	1	Inverter	14-TSSOP	-	32 mA	2 V	1.08 V	0.173 " 4.4 mm	14-TSSOP	125 °C	-40 C

Pricing

Prices provided here are for design reference only. For realtime values and availability, please visit the distributors directly

Distributor	Package	Quantity	$

Digikey	N/A	49034	$ 0.36

Description

General part information

74LVC06APW Series

The 74LVC06A provides six inverting buffers. The outputs are open-drain and can be connected to other open-drain outputs to implement active-LOW wired-OR or active-HIGH wired-AND functions.

Documents

Technical documentation and resources

plastic, thin shrink small outline package; 14 leads; 0.65 mm pitch; 5 mm x 4.4 mm x 1.1 mm body

Marcom graphics

Pin FMEA for LVC family

Application note

Power considerations when using CMOS and BiCMOS logic devices

Application note

74LVC06APW Nexperia Product Reliability

Quality document

Nexperia package poster

Leaflet

plastic, thin shrink small outline package; 14 leads; 0.65 mm pitch; 5 mm x 4.4 mm x 1.2 mm body

Package information