The 841664I is an optimized sRIO clock generator. The device uses a 25MHz parallel crystal to generate 125MHz and 156.25MHz clock signals, replacing solution requiring multiple oscillator and fanout buffer solutions. The device has excellent phase jitter (< 1ps rms) suitable to clock components requiring precise and low-jitter sRIO clock signals. Designed for telecom, networking and industrial application, the 841664I can also drive the high-speed sRIO SerDes clock inputs of communication processors, DSPs, switches and bridges.