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128-LQFP
Integrated Circuits (ICs)

ADSP-2181BST-115

Obsolete
Analog Devices Inc./Maxim Integrated

IC DSP CONTROLLER 16BIT 128TQFP

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128-LQFP
Integrated Circuits (ICs)

ADSP-2181BST-115

Obsolete
Analog Devices Inc./Maxim Integrated

IC DSP CONTROLLER 16BIT 128TQFP

Deep-Dive with AI

DocumentsDatasheet

Technical Specifications

Parameters and characteristics for this part

SpecificationADSP-2181BST-115
Clock Rate (Frequency)28.8 MHz
InterfaceSynchronous Serial Port (SSP)
Mounting TypeSurface Mount
Non-Volatile Memory TypeExternal
On-Chip RAM80 kB
Operating Temperature (Max)85 °C
Operating Temperature (Min)-40 °C
Package / Case128-LQFP
Package Length14 mm
Package Name128-TQFP
Package Width20 mm
TypeFixed Point
Voltage - Core5 V
Voltage - I/O5 V

Pricing

Prices provided here are for design reference only. For realtime values and availability, please visit the distributors directly

DistributorPackageQuantity$Updated
DigikeyBag 7$ 44.421m+

CAD

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Description

General part information

ADSP-2181 Series

The ADSP-2181 is a single-chip microcomputer optimized for digital signal processing (DSP) and other high speed numeric processing applications.The ADSP-2181 combines the ADSP-2100 family base architecture(three computational units, data address generators and a program sequencer) with two serial ports, a 16-bit internal DMA port, a byte DMA port, a programmable timer, Flag I/O, extensive interrupt capabilities, and on-chip program and data memory.The ADSP-2181 integrates 80K bytes of on-chip memory configured as 16K words (24-bit) of program RAM, and 16K words (16-bit) of data RAM. Power-down circuitry is also provided to meet the low power needs of battery operated portable equipment. The ADSP-2181 is available in 128-pin TQFP and 128- pin PQFP packages.In addition, the ADSP-2181 supports new instructions, which include bit manipulations-bit set, bit clear, bit toggle, bit test- new ALU constants, new multiplication instruction (x squared), biased rounding, result free ALU operations, I/O memory transfers and global interrupt masking for increased flexibility. Fabricated in a high speed, double metal, low power, CMOS process, the ADSP-2181 operates with a 30 ns instruction cycle time. Every instruction can execute in a single processor cycle. The ADSP-2181's flexible architecture and comprehensive instruction set allow the processor to perform multiple operations in parallel. In one processor cycle the ADSP-2181 can:Generate the next program addressFetch the next instructionPerform one or two data movesUpdate one or two data address pointersPerform a computational operation

Documents

Technical documentation and resources