DS90UA102TRHSTQ1
ActiveMULTI-CHANNEL DIGITAL AUDIO DESERIALIZER
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DS90UA102TRHSTQ1
ActiveMULTI-CHANNEL DIGITAL AUDIO DESERIALIZER
Technical Specifications
Parameters and characteristics for this part
| Specification | DS90UA102TRHSTQ1 |
|---|---|
| Data Rate | 600 Mbps |
| Function | Deserializer |
| Grade | Automotive |
| Input Type | FPD-Link III, LVDS |
| Mounting Type | Surface Mount |
| Number of Inputs | 1 |
| Number of Outputs | 4 |
| Operating Temperature [Max] | 105 °C |
| Operating Temperature [Min] | -40 °C |
| Output Type | LVCMOS |
| Package / Case | 48-WFQFN Exposed Pad |
| Qualification | AEC-Q100 |
| Supplier Device Package | 48-WQFN (7x7) |
| Voltage - Supply [Max] | 1.89 V |
| Voltage - Supply [Min] | 1.71 V |
Pricing
Prices provided here are for design reference only. For realtime values and availability, please visit the distributors directly
| Distributor | Package | Quantity | $ | |
|---|---|---|---|---|
| Digikey | Tape & Reel (TR) | 250 | $ 8.96 | |
| 500 | $ 8.38 | |||
| 1250 | $ 7.69 | |||
| Texas Instruments | SMALL T&R | 1 | $ 9.50 | |
| 100 | $ 8.30 | |||
| 250 | $ 6.40 | |||
| 1000 | $ 5.72 | |||
Description
General part information
DS90UA102-Q1 Series
The DS90UA102-Q1 Deserializer, in conjunction with the DS90UA101-Q1 Serializer, provides a solution for distribution of digital audio in multi-channel audio systems. It receives a high-speed serialized interface with an embedded clock over a single shielded twisted pair or coaxial cable. The serial bus scheme supports high speed forward data transmission and low speed bidirectional control channel over the link. Consolidation of digital audio, general-purpose IO, and control signals over a single differential pair reduces the interconnect size and weight, while also reducing design challenges related to skew and system latency.
The DS90UA102-Q1 Deserializer extracts the clock and level shifts the signals from high-speed low voltage differential signaling to single-ended LVCMOS. The device outputs up to eight digital audio data channels, word/frame sync, bit clock, and system clock.
Four dedicated general purpose input pins and four general purpose output pins allow flexible implementation of control and interrupt signals to and from remote devices.