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TLC555IP

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Texas Instruments

IC OSC SINGLE TIMER 2.1MHZ 8-DIP

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PDIP (P)
Integrated Circuits (ICs)

TLC555IP

Active
Texas Instruments

IC OSC SINGLE TIMER 2.1MHZ 8-DIP

Technical Specifications

Parameters and characteristics for this part

SpecificationTLC555IP
Current - Supply360 µA
Frequency2.1 MHz
Mounting TypeThrough Hole
Operating Temperature [Max]85 °C
Operating Temperature [Min]-40 °C
Package / Case0.3 in
Package / Case8-DIP
Package / Case7.62 mm
Supplier Device Package8-PDIP
Type555 Type, Timer/Oscillator (Single)
Voltage - Supply [Max]15 V
Voltage - Supply [Min]3 V

Pricing

Prices provided here are for design reference only. For realtime values and availability, please visit the distributors directly

DistributorPackageQuantity$
DigikeyTube 1$ 0.99
10$ 0.89
50$ 0.84
100$ 0.69
250$ 0.65
500$ 0.57
1000$ 0.45
2500$ 0.42
5000$ 0.40
Texas InstrumentsTUBE 1$ 0.85
100$ 0.58
250$ 0.45
1000$ 0.30

Description

General part information

TLC555-Q1 Series

The TLC555-Q1 is a monolithic timing circuit fabricated using TI LinCMOS™ technology. The timer is fully compatible with CMOS, TTL, and MOS logic and operates at frequencies up to 2MHz. As a result of the high input impedance, this device supports smaller timing capacitors than capacitors used by theNE555. Thus, more accurate time delays and oscillations are possible. Power consumption is low across the full power-supply voltage range.

Like the NE555, the TLC555-Q1 has a trigger level equal to approximately one-third of the supply voltage, and a threshold level equal to approximately two-thirds of the supply voltage. These levels can be altered by using the control voltage pin (CONT). When the trigger input (TRIG) falls below the trigger level, the flip-flop is set, and the output goes high. If TRIG is greater than the trigger level and the threshold input (THRES) is greater than the threshold level, the flip-flop is reset and the output goes low. The reset input (RESET) can override all other inputs and is used to initiate a new timing cycle. If RESET is low, the flip-flop is reset and the output goes low. Whenever the output is low, a low-impedance path is provided between the discharge pin (DISCH) and GND. Tie all unused inputs to an appropriate logic level to prevent false triggering.

The TLC555-Q1 is a monolithic timing circuit fabricated using TI LinCMOS™ technology. The timer is fully compatible with CMOS, TTL, and MOS logic and operates at frequencies up to 2MHz. As a result of the high input impedance, this device supports smaller timing capacitors than capacitors used by theNE555. Thus, more accurate time delays and oscillations are possible. Power consumption is low across the full power-supply voltage range.