
8531AY-01LF
ObsoleteLOW SKEW,1-TO-9 DIFFERENTIAL-TO-3.3V LVPECL FANOUT BUFFER
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8531AY-01LF
ObsoleteLOW SKEW,1-TO-9 DIFFERENTIAL-TO-3.3V LVPECL FANOUT BUFFER
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Technical Specifications
Parameters and characteristics for this part
| Specification | 8531AY-01LF |
|---|---|
| Differential - Input:Output [custom] | True |
| Differential - Input:Output [custom] | True |
| Frequency - Max [Max] | 500 MHz |
| Input | SSTL, CML, LVDS, HCSL, LVHSTL, LVPECL |
| Mounting Type | Surface Mount |
| Number of Circuits | 1 |
| Operating Temperature [Max] | 70 °C |
| Operating Temperature [Min] | 0 °C |
| Output | LVPECL |
| Package / Case | 32-LQFP |
| Ratio - Input:Output [custom] | 2:9 |
| Supplier Device Package | 32-TQFP (7x7) |
| Type | Fanout Buffer (Distribution), Multiplexer |
| Voltage - Supply [Max] | 3.465 V |
| Voltage - Supply [Min] | 3.135 V |
Pricing
Prices provided here are for design reference only. For realtime values and availability, please visit the distributors directly
| Distributor | Package | Quantity | $ | |
|---|---|---|---|---|
| Digikey | Tray | 1 | $ 32.88 | |
| 10 | $ 24.69 | |||
Description
General part information
8531-01 Series
The 8531-01 is a low skew, high performance 1-to-9 Differential-to-3.3V LVPECL Fanout Buffer and a member of the family of High Performance Clock Solutions from IDT. The 8531-01 has two selectable clock inputs. The CLK, nCLK pair can accept most standard differential input levels. The PCLK, nPCLK pair can accept LVPECL, CML, or SSTL input levels. The clock enable is internally synchronized to eliminate runt pulses on the outputs during asynchronous assertion/deassertion of the clock enable pin. Guaranteed output skew and part-to-part skew characteristics make the 8531-01 ideal for high performance workstation and server applications.
Documents
Technical documentation and resources