CD4063BM96
ActiveMAGNITUDE COMPARATOR 4-BIT 16-PIN SOIC T/R
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CD4063BM96
ActiveMAGNITUDE COMPARATOR 4-BIT 16-PIN SOIC T/R
Technical Specifications
Parameters and characteristics for this part
| Specification | CD4063BM96 |
|---|---|
| Current - Output High, Low [custom] | 4.2 mA |
| Current - Output High, Low [custom] | 4.2 mA |
| Current - Quiescent (Iq) | 100 µA |
| Max Propagation Delay @ V, Max CL | 350 ns |
| Mounting Type | Surface Mount |
| Number of Bits | 4 |
| Operating Temperature [Max] | 125 °C |
| Operating Temperature [Min] | -55 °C |
| Output | Active High |
| Output Function | A<B, A>B, A=B |
| Package / Case | 16-SOIC |
| Package / Case [x] | 0.154 in |
| Package / Case [y] | 3.9 mm |
| Supplier Device Package | 16-SOIC |
| Type | Magnitude Comparator |
| Voltage - Supply [Max] | 18 V |
| Voltage - Supply [Min] | 3 V |
Pricing
Prices provided here are for design reference only. For realtime values and availability, please visit the distributors directly
| Distributor | Package | Quantity | $ | |
|---|---|---|---|---|
| Digikey | Cut Tape (CT) | 1 | $ 0.47 | |
| 10 | $ 0.40 | |||
| 25 | $ 0.37 | |||
| 100 | $ 0.30 | |||
| 250 | $ 0.28 | |||
| 500 | $ 0.24 | |||
| 1000 | $ 0.18 | |||
| Digi-Reel® | 1 | $ 0.47 | ||
| 10 | $ 0.40 | |||
| 25 | $ 0.37 | |||
| 100 | $ 0.30 | |||
| 250 | $ 0.28 | |||
| 500 | $ 0.24 | |||
| 1000 | $ 0.18 | |||
| Tape & Reel (TR) | 2500 | $ 0.17 | ||
| 5000 | $ 0.16 | |||
| 12500 | $ 0.14 | |||
| 25000 | $ 0.14 | |||
| 62500 | $ 0.13 | |||
| Texas Instruments | LARGE T&R | 1 | $ 0.35 | |
| 100 | $ 0.24 | |||
| 250 | $ 0.18 | |||
| 1000 | $ 0.12 | |||
Description
General part information
CD4063B Series
CD4063B is a 4-bit magnitude comparator designed for use in computer and logic applications that require the comparison of two 4-bit words. This logic circuit determines whether one 4-bit word (Binary or BCD) is "less than", "equal to", or "greater than" a second 4-bit word.
The CD4063B has eight comparing inputs (A3, B3, through A0, B0), three outputs (A < B, A = B, A > B) and three cascading inputs (A < B, A = B, A > B) that permit systems designers to expand the comparator function to 8, 12, 16 . . . 4N bits. When a single CD4063B is used, the cascading inputs are connected as follows: (A < B) = low, (A = B) = high, (A > B) = low.
For words longer than 4 bits, CD4063B devices may be cascaded by connecting the outputs of the less-significant comparator to the corresponding cascading inputs of the more-significant comparator. Cascading inputs (A < B, A = B, and A > B) on the least significant comparator are connected to a low, a high, and a low level, respectively.
Documents
Technical documentation and resources
