Zenode.ai Logo
Beta
Texas Instruments-CD74FCT244ATE Buffers and Line Drivers Buffer/Line Driver 8-CH Non-Inverting 3-ST CMOS 20-Pin PDIP Tube
Integrated Circuits (ICs)

SN74BCT573N

Active
Texas Instruments

LATCH TRANSPARENT 3-ST 8-CH D-TYPE 20-PIN PDIP TUBE

Deep-Dive with AI

Search across all available documentation for this part.

Texas Instruments-CD74FCT244ATE Buffers and Line Drivers Buffer/Line Driver 8-CH Non-Inverting 3-ST CMOS 20-Pin PDIP Tube
Integrated Circuits (ICs)

SN74BCT573N

Active
Texas Instruments

LATCH TRANSPARENT 3-ST 8-CH D-TYPE 20-PIN PDIP TUBE

Deep-Dive with AI

Technical Specifications

Parameters and characteristics for this part

SpecificationSN74BCT573N
Circuit [custom]8
Circuit [custom]8
Current - Output High, Low [custom]64 mA
Current - Output High, Low [custom]15 mA
Delay Time - Propagation6.1 ns
Independent Circuits1
Logic TypeD-Type Transparent Latch
Mounting TypeThrough Hole
Operating Temperature [Max]70 °C
Operating Temperature [Min]0 °C
Output TypeTri-State
Package / Case20-DIP
Package / Case7.62 mm
Package / Case0.3 in
Supplier Device Package20-PDIP
Voltage - Supply [Max]5.5 V
Voltage - Supply [Min]4.5 V

Pricing

Prices provided here are for design reference only. For realtime values and availability, please visit the distributors directly

DistributorPackageQuantity$
ArrowN/A 20$ 3.24
DigikeyTube 220$ 4.78
Texas InstrumentsTUBE 1$ 5.13
100$ 4.18
250$ 3.29
1000$ 2.79

Description

General part information

SN74BCT573 Series

These 8-bit latches feature 3-state outputs designed specifically for driving highly capacitive or relatively low-impedance loads. They are particularly suitable for implementing buffer registers, I/O ports, bidirectional bus drivers, and working registers.

The eight latches of the ’BCT573 devices are transparent D-type latches. While the latch-enable (LE) input is high, the Q outputs follow the data (D) inputs. When the latch enable is taken low, the Q outputs are latched at the logic levels that were set up at the D inputs.

A buffered output-enable (OE)\ input can be used to place the eight outputs in either a normal logic state (high or low logic levels) or the high-impedance state. In the high-impedance state, the outputs neither load nor drive the bus lines significantly. The high-impedance state and increased drive provide the capability to drive bus lines without interface or pullup components.

Documents

Technical documentation and resources