Specification	SNJ54ABT821JT

Clock Frequency	125 MHz
Current - Output High, Low [custom]	24 mA
Current - Output High, Low [custom]	48 mA
Current - Quiescent (Iq)	38 mA
Function	Standard
Input Capacitance	3.5 pF
Max Propagation Delay @ V, Max CL	6.2 ns
Mounting Type	Through Hole
Number of Bits per Element	10
Number of Elements	1
Operating Temperature [Max]	125 °C
Operating Temperature [Min]	-55 °C
Output Type	Tri-State, Non-Inverted
Package / Case	24-CDIP
Supplier Device Package	24-CDIP
Trigger Type	Positive Edge
Type	D-Type
Voltage - Supply [Max]	5.5 V
Voltage - Supply [Min]	4.5 V

SN54ABT821 Series

10-Bit Bus Interface Flip-Flops With 3-State Outputs

Part	Clock Frequency	Max Propagation Delay @ V, Max CL	Function	Trigger Type	Supplier Device Package	Output Type	Number of Elements	Operating Temperature [Max]	Operating Temperature [Min]	Current - Output High, Low [custom]	Current - Output High, Low [custom]	Input Capacitance	Current - Quiescent (Iq)	Mounting Type	Type	Package / Case	Number of Bits per Element	Voltage - Supply [Min]	Voltage - Supply [Max]
Texas Instruments SNJ54ABT821JT	125 MHz	6.2 ns	Standard	Positive Edge	24-CDIP	Non-Inverted Tri-State	1	125 °C	-55 °C	24 mA	48 mA	3.5 pF	38 mA	Through Hole	D-Type	24-CDIP	10	4.5 V	5.5 V

Pricing

Prices provided here are for design reference only. For realtime values and availability, please visit the distributors directly

Distributor	Package	Quantity	$

Texas Instruments	TUBE	1	$ 43.26
		100	$ 38.45
		250	$ 31.61
		1000	$ 28.27

Description

General part information

SN54ABT821 Series

These 10-bit flip-flops feature 3-state outputs designed specifically for driving highly capacitive or relatively low-impedance loads. They are particularly suitable for implementing wider buffer registers, I/O ports, bidirectional bus drivers with parity, and working registers.

The ten flip-flops are edge-triggered D-type flip-flops. On the positive transition of the clock (CLK) input, the devices provide true data at the Q outputs.

A buffered output-enable (OE\) input can be used to place the ten outputs in either a normal logic state (high or low logic levels) or a high-impedance state. In the high-impedance state, the outputs neither load nor drive the bus lines significantly. The high-impedance state and increased drive provide the capability to drive bus lines without need for interface or pullup components.

Documents

Technical documentation and resources

10-Bit Bus-Interface Flip-Flops With 3-State Outputs datasheet (Rev. E)

Data sheet