
AD5346BRUZ
Active2.5 V TO 5.5 V, PARALLEL INTERFACE OCTAL VOLTAGE OUTPUT 8-BIT D/A CONVERTER
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AD5346BRUZ
Active2.5 V TO 5.5 V, PARALLEL INTERFACE OCTAL VOLTAGE OUTPUT 8-BIT D/A CONVERTER
Technical Specifications
Parameters and characteristics for this part
| Specification | AD5346BRUZ |
|---|---|
| Architecture | String DAC |
| Data Interface | Parallel |
| Differential Output | No |
| DNL (LSB) Tolerance | 0.02 LSB |
| INL (LSB) Tolerance | 0.15 LSB |
| Mounting Type | Surface Mount |
| Number of Bits | 8 bits |
| Number of D/A Converters | 8 count |
| Operating Temperature (Max) | 105 °C |
| Operating Temperature (Min) | -40 °C |
| Output Type | Voltage - Buffered |
| Package Length | 0.173 in |
| Package Name | 38-TFSOP, 38-TSSOP |
| Package Width | 4.4 mm |
| Reference Type | External |
| Settling Time | 8 µs |
| Voltage - Supply, Analog (Max) | 5.5 V |
| Voltage - Supply, Analog (Min) | 2.5 V |
| Voltage - Supply, Digital (Max) | 5.5 V |
| Voltage - Supply, Digital (Min) | 2.5 V |
Pricing
Prices provided here are for design reference only. For realtime values and availability, please visit the distributors directly
| Distributor | Package | Quantity | $ | Updated |
|---|---|---|---|---|
| Digikey | Tube | 1 | $ 11.98 | <1d |
| 10 | $ 9.40 | |||
| 50 | $ 8.37 | |||
| 100 | $ 8.05 | |||
| 250 | $ 7.71 | |||
| 500 | $ 7.51 | |||
| 1000 | $ 7.34 | |||
CAD
3D models and CAD resources for this part
Description
General part information
AD5346 Series
The AD5346 /AD5347/AD5348are octal 8-, 10-, and 12- bit DACs, operating from a 2.5 V to 5.5 V supply. These devices incorporate an on-chip output buffer that can drive the output to both supply rails, and also allows a choice of buffered or unbuffered reference input.The AD5346 / AD5347 / AD5348 have a parallel interface.CSselects the device and data is loaded into the input registers on the rising edge ofWR. A readback feature allows the internal DAC registers to be read back through the digital port.The GAIN pin on these devices allows the output range to be set at 0 V to VREFor 0 V to 2 x VREF.Input data to the DACs is double-buffered, allowing simultaneous update of multiple DACs in a system using theLDACpin.An asynchronousCLRinput is also provided, which resets the contents of the Input Register and the DAC Register to all zeros. These devices also incorporate a power-on-reset circuit that ensures that the DAC output powers on to 0 V and remains there until valid data is written to the device. All three parts are pin-compatible, which allows the user to select the amount of resolution appropriate for their application without redesigning their circuit board.APPLICATIONSPortable battery-powered instrumentsDigital gain and offset adjustmentProgrammable voltage and current sourcesOptical networkingAutomatic test equipmentMobile communicationsProgrammable attenuatorsIndustrial process control
Documents
Technical documentation and resources