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8 SOIC Pin View
Integrated Circuits (ICs)

FM24V10-GTR

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INFINEON

FERROELECTRIC RAM (FRAM), 1 MBIT, 128K X 8BIT, I2C, 3.4 MHZ, 2 V TO 3.6 V SUPPLY, SOIC-8

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8 SOIC Pin View
Integrated Circuits (ICs)

FM24V10-GTR

Active
INFINEON

FERROELECTRIC RAM (FRAM), 1 MBIT, 128K X 8BIT, I2C, 3.4 MHZ, 2 V TO 3.6 V SUPPLY, SOIC-8

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Technical Specifications

Parameters and characteristics for this part

SpecificationFM24V10-GTR
Access Time130 ns
Clock Frequency3.4 MHz
Memory FormatFRAM
Memory InterfaceI2C
Memory Organization128 K
Memory Size1 Mbit
Memory TypeNon-Volatile
Mounting TypeSurface Mount
Operating Temperature [Max]85 C
Operating Temperature [Min]-40 ¯C
Package / Case0.154 in
Package / Case8-SOIC
Package / Case3.9 mm
Supplier Device Package8-SOIC
TechnologyFRAM (Ferroelectric RAM)
Voltage - Supply [Max]3.6 V
Voltage - Supply [Min]2 V

Pricing

Prices provided here are for design reference only. For realtime values and availability, please visit the distributors directly

DistributorPackageQuantity$
DigikeyCut Tape (CT) 1$ 16.52
1$ 16.52
10$ 15.30
10$ 15.30
25$ 15.09
25$ 15.09
50$ 14.90
50$ 14.90
100$ 13.06
100$ 13.06
250$ 12.50
250$ 12.50
500$ 12.42
500$ 12.42
Digi-Reel® 1$ 16.52
1$ 16.52
10$ 15.30
10$ 15.30
25$ 15.09
25$ 15.09
50$ 14.90
50$ 14.90
100$ 13.06
100$ 13.06
250$ 12.50
250$ 12.50
500$ 12.42
500$ 12.42
N/A 1574$ 15.71
1574$ 15.71
Tape & Reel (TR) 50$ 12.50
50$ 12.50
2500$ 11.49
2500$ 11.49

Description

General part information

FM24V10 Series

FM24V10-GTR is a 1Mbit (128K × 8) serial (I²C) F-RAM. It is a 1Mbit non-volatile memory employing an advanced ferroelectric process. A ferroelectric random access memory or F-RAM is non-volatile and performs reads and writes similar to a RAM. It provides reliable data retention for 151 years while eliminating the complexities, overhead, and system-level reliability problems caused by EEPROM and other non-volatile memories. Unlike EEPROM, the FM24V10 performs write operations at bus speed. No write delays are incurred. Data is written to the memory array immediately after each byte is successfully transferred to the device. The next bus cycle can commence without the need for data polling.

Documents

Technical documentation and resources