Zenode.ai Logo
Beta
Infineon Technologies AG-CY7C1069G-10ZSXI SRAM Chip SRAM Chip Async Single 5V 16M-bit 2M x 8 10ns 54-Pin TSOP-II Tray
Integrated Circuits (ICs)

CY7C10612G30-10ZSXI

Active
INFINEON

SRAM CHIP ASYNC SINGLE 3.3V 16M-BIT 1M X 16 10NS 54-PIN TSOP-II TRAY

Deep-Dive with AI

Search across all available documentation for this part.

Infineon Technologies AG-CY7C1069G-10ZSXI SRAM Chip SRAM Chip Async Single 5V 16M-bit 2M x 8 10ns 54-Pin TSOP-II Tray
Integrated Circuits (ICs)

CY7C10612G30-10ZSXI

Active
INFINEON

SRAM CHIP ASYNC SINGLE 3.3V 16M-BIT 1M X 16 10NS 54-PIN TSOP-II TRAY

Deep-Dive with AI

Technical Specifications

Parameters and characteristics for this part

SpecificationCY7C10612G30-10ZSXI
Access Time10 ns
Memory FormatSRAM
Memory InterfaceParallel
Memory Organization1 M
Memory Size2 MB
Memory TypeVolatile
Mounting TypeSurface Mount
Operating Temperature [Max]85 C
Operating Temperature [Min]-40 ¯C
Supplier Device Package54-TSOP II
TechnologySRAM - Asynchronous
Voltage - Supply [Max]3.6 V
Voltage - Supply [Min]3 V
Write Cycle Time - Word, Page10 ns

Pricing

Prices provided here are for design reference only. For realtime values and availability, please visit the distributors directly

DistributorPackageQuantity$
ArrowN/A 1$ 21.10
5$ 20.50
10$ 19.50
50$ 18.20
100$ 15.80
DigikeyN/A 76$ 21.31
Tray 1$ 20.64
10$ 19.23
25$ 19.02
40$ 18.55
108$ 16.28
324$ 15.73
540$ 15.31
NewarkEach 1$ 21.96
5$ 20.83
10$ 19.69
25$ 18.34
50$ 18.32
100$ 16.28
432$ 16.00

Description

General part information

CY7C10612 Series

CY7C10612G30-10ZSXI is a high performance CMOS fast static RAM device with embedded ECC. The device includes an error indication pin that signals an error detection and correction event during a read cycle. To write to the device, take chip enables (active-low CE) and write enable (active-low WE) input LOW. To read from the device, take chip enable (active-low CE) and output enable (active-low OE) LOW while forcing the write enable (active-low WE) HIGH. The input or output pins (I/O0 through I/O15) are placed in a high impedance state when the device is deselected (active-low CE HIGH), the outputs are disabled (active-low OE HIGH), the active-low BHE and active-low BLE are disabled (active-low BHE, active-low BLE HIGH), or during a write operation (active-low CE LOW and active-low WE LOW).

Documents

Technical documentation and resources