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32-WQFN-Exposed-Pad
Integrated Circuits (ICs)

DS90UB633ARTVRQ1

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Texas Instruments

DS90UB633A Q1 FPD LINK III SERIALIZER FOR 1 MP 60 FPS CAMERAS 10 12 BITS,100 MHZ AUTOMOTIVE AEC-Q100

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32-WQFN-Exposed-Pad
Integrated Circuits (ICs)

DS90UB633ARTVRQ1

Active
Texas Instruments

DS90UB633A Q1 FPD LINK III SERIALIZER FOR 1 MP 60 FPS CAMERAS 10 12 BITS,100 MHZ AUTOMOTIVE AEC-Q100

Deep-Dive with AI

DocumentsDatasheet

Technical Specifications

Parameters and characteristics for this part

SpecificationDS90UB633ARTVRQ1
Data Rate1.87 Gbps
FunctionSerializer/Deserializer
GradeAutomotive
Input TypeLVCMOS, CML
Mounting TypeSurface Mount
Number of Inputs12
Number of Outputs1
Operating Temperature [Max]105 °C
Operating Temperature [Min]-40 °C
Output TypeCML, LVCMOS
QualificationAEC-Q100
Supplier Device Package32-WQFN (5x5)
Voltage - Supply [Max]1.89 V
Voltage - Supply [Min]1.71 V

Pricing

Prices provided here are for design reference only. For realtime values and availability, please visit the distributors directly

DistributorPackageQuantity$
DigikeyTape & Reel (TR) 1000$ 3.62
2000$ 3.49
Texas InstrumentsLARGE T&R 1$ 4.88
100$ 3.98
250$ 3.13
1000$ 2.65

Description

General part information

DS90UB633A-Q1 Series

The DS90UB633A-Q1 device offers an FPD-Link III interface with a high-speed forward channel and a bidirectional control channel for data transmission over a single coaxial cable or differential pair. The DS90UB633A-Q1 device incorporates differential signaling on both the high-speed forward channel and bidirectional control channel data paths. The serializer/deserializer pair is targeted for connections between imagers and video processors in an electronic control unit (ECU). This device is ideally suited for driving video data requiring up to 12-bit pixel depth plus two synchronization signals along with bidirectional control channel bus.

Using TI’s embedded clock technology allows transparent full-duplex communication over a single differential pair, carrying asymmetrical-bidirectional control channel information. This single serial stream simplifies transferring a wide data bus over PCB traces and cable by eliminating the skew problems between parallel data and clock paths. This significantly saves system cost by narrowing data paths that in turn reduce PCB layers, cable width, and connector size and pins. Internal DC-balanced encoding/decoding is used to support AC-coupled interconnects.

The DS90UB633A-Q1 device offers an FPD-Link III interface with a high-speed forward channel and a bidirectional control channel for data transmission over a single coaxial cable or differential pair. The DS90UB633A-Q1 device incorporates differential signaling on both the high-speed forward channel and bidirectional control channel data paths. The serializer/deserializer pair is targeted for connections between imagers and video processors in an electronic control unit (ECU). This device is ideally suited for driving video data requiring up to 12-bit pixel depth plus two synchronization signals along with bidirectional control channel bus.

Documents

Technical documentation and resources