Deep-Dive with AI
Search across all available documentation for this part.
Deep-Dive with AI
Technical Specifications
Parameters and characteristics for this part
| Specification | SN74ALS621ADWR |
|---|---|
| Current - Output High, Low [custom] | 24 mA |
| Current - Output High, Low [custom] | - |
| Mounting Type | Surface Mount |
| Number of Bits per Element | 8 |
| Number of Elements | 1 |
| Operating Temperature [Max] | 70 °C |
| Operating Temperature [Min] | 0 °C |
| Output Type | Open Collector |
| Package / Case | 20-SOIC |
| Package / Case [y] | 0.295 in |
| Package / Case [y] | 7.5 mm |
| Supplier Device Package | 20-SOIC |
| Voltage - Supply [Max] | 5.5 V |
| Voltage - Supply [Min] | 4.5 V |
Pricing
Prices provided here are for design reference only. For realtime values and availability, please visit the distributors directly
| Distributor | Package | Quantity | $ | |
|---|---|---|---|---|
Description
General part information
SN74ALS621A-1 Series
These octal bus transceivers are designed for asynchronous two-way communication between data buses. The control-function implementation allows for maximum flexibility in timing.
These devices allow data transmission from the A bus to the B bus or from the B bus to the A bus, depending upon the logic levels at the output-enable (OEAB and) inputs.
The output-enable inputs disable the device so that the buses are effectively isolated. The dual-enable configuration gives the transceivers the capability to store data by simultaneously enabling OEAB and. Each output reinforces its input in this transceiver configuration. When both OEAB andare enabled and all other data sources to the two sets of bus lines are in the high-impedance state, both sets of bus lines (16 total) remain at their last states. The 8-bit codes appearing on the two sets of buses are identical for the SN74ALS621A, SN74ALS623A, and SN74AS623 or complementary for the SN74ALS620A.
Documents
Technical documentation and resources
