Integrated Circuits (ICs)

JM54AC109S2A-RH

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54AC109 - DUAL J-K FLIP-FLOP WIT

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Integrated Circuits (ICs)

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54AC109 - DUAL J-K FLIP-FLOP WIT

Technical Specifications

Parameters and characteristics for this part

Specification	JM54AC109S2A-RH

Clock Frequency	95 MHz
Current - Output High, Low [custom]	24 mA
Current - Output High, Low [custom]	24 mA
Function	Set(Preset) and Reset
Input Capacitance	4.5 pF
Max Propagation Delay @ V, Max CL	12 ns
Mounting Type	Surface Mount
Number of Bits per Element	1
Number of Elements	2
Operating Temperature [Max]	125 °C
Operating Temperature [Min]	-55 °C
Output Type	Complementary
Package / Case	20-CLCC
Supplier Device Package	20-LCCC (8.89x8.89)
Trigger Type	Positive Edge
Type	JK Type
Voltage - Supply [Max]	6 V
Voltage - Supply [Min]	2 V

Part	Operating Temperature [Max]	Operating Temperature [Min]	Max Propagation Delay @ V, Max CL	Clock Frequency	Output Type	Number of Elements	Package / Case	Current - Output High, Low [custom]	Current - Output High, Low [custom]	Number of Bits per Element	Supplier Device Package	Type	Trigger Type	Input Capacitance	Function	Mounting Type	Voltage - Supply [Max]	Voltage - Supply [Min]
Texas Instruments JM54AC109S2A-RH	125 °C	-55 °C	12 ns	95 MHz	Complementary	2	20-CLCC	24 mA	24 mA	1	20-LCCC (8.89x8.89)	JK Type	Positive Edge	4.5 pF	Set(Preset) and Reset	Surface Mount	6 V	2 V
Texas Instruments JM54AC109B2A-RH	125 °C	-55 °C	12 ns	95 MHz	Complementary	2	20-CLCC	24 mA	24 mA	1	20-LCCC (8.89x8.89)	JK Type	Positive Edge	4.5 pF	Set(Preset) and Reset	Surface Mount	6 V	2 V
Texas Instruments JM54AC109SFA-RH	125 °C	-55 °C	12 ns	95 MHz	Complementary	2	16-CFlatPack	24 mA	24 mA	1		JK Type	Positive Edge	4.5 pF	Set(Preset) and Reset	Surface Mount	6 V	2 V

Prices provided here are for design reference only. For realtime values and availability, please visit the distributors directly

General part information

Flip Flop 2 Element JK Type 1 Bit Positive Edge 20-CLCC

Technical documentation and resources

No documents available