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Texas Instruments-LMK00306EVM/NOPB Clock and Timing Development Boards and Kits LMK00306 Clock Buffer and Driver Evaluation Board
Development Boards, Kits, Programmers

LMK00306EVM/NOPB

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Texas Instruments

LMK00306 CLOCK BUFFER AND DRIVER EVALUATION BOARD

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Texas Instruments-LMK00306EVM/NOPB Clock and Timing Development Boards and Kits LMK00306 Clock Buffer and Driver Evaluation Board
Development Boards, Kits, Programmers

LMK00306EVM/NOPB

Active
Texas Instruments

LMK00306 CLOCK BUFFER AND DRIVER EVALUATION BOARD

Deep-Dive with AI

DocumentsDatasheet

Technical Specifications

Parameters and characteristics for this part

SpecificationLMK00306EVM/NOPB
ContentsBoard(s)
EmbeddedFalse
FunctionClock Distribution
Supplied ContentsBoard(s)
TypeTiming
Utilized IC / PartLMK00306

Pricing

Prices provided here are for design reference only. For realtime values and availability, please visit the distributors directly

DistributorPackageQuantity$
DigikeyBox 1$ 298.80

Description

General part information

LMK00306 Series

The LMK00306 is a 3-GHz, 6-output differential fanout buffer intended for high-frequency, low-jitter clock/data distribution and level translation. The input clock can be selected from two universal inputs or one crystal input. The selected input clock is distributed to two banks of 3 differential outputs and one LVCMOS output. Both differential output banks can be independently configured as LVPECL, LVDS, or HCSL drivers, or disabled. The LVCMOS output has a synchronous enable input for runt-pulse-free operation when enabled or disabled. The LMK00306 operates from a 3.3 V core supply and 3 independent 3.3 V/2.5 V output supplies.

The LMK00306 provides high performance, versatility, and power efficiency, making it ideal for replacing fixed-output buffer devices while increasing timing margin in the system.

The LMK00306 is a 3-GHz, 6-output differential fanout buffer intended for high-frequency, low-jitter clock/data distribution and level translation. The input clock can be selected from two universal inputs or one crystal input. The selected input clock is distributed to two banks of 3 differential outputs and one LVCMOS output. Both differential output banks can be independently configured as LVPECL, LVDS, or HCSL drivers, or disabled. The LVCMOS output has a synchronous enable input for runt-pulse-free operation when enabled or disabled. The LMK00306 operates from a 3.3 V core supply and 3 independent 3.3 V/2.5 V output supplies.

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