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Integrated Circuits (ICs)

SN74LVC1G386YZPR

Active
Texas Instruments

SINGLE 3-INPUT, 1.65-V TO 5.5-V XOR (EXCLUSIVE OR) GATE

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YZP-6-BGA Pkg
Integrated Circuits (ICs)

SN74LVC1G386YZPR

Active
Texas Instruments

SINGLE 3-INPUT, 1.65-V TO 5.5-V XOR (EXCLUSIVE OR) GATE

Technical Specifications

Parameters and characteristics for this part

SpecificationSN74LVC1G386YZPR
Current - Output High, Low [x]32 mA
Current - Output High, Low [y]32 mA
Current - Quiescent (Max) [Max]10 µA
Input Logic Level - High [Max]2 V
Input Logic Level - High [Min]1.7 V
Input Logic Level - Low [Max]0.8 V
Input Logic Level - Low [Min]0.7 V
Logic TypeXOR (Exclusive OR)
Max Propagation Delay @ V, Max CL4 ns
Mounting TypeSurface Mount
Number of Circuits1
Number of Inputs3
Operating Temperature [Max]85 °C
Operating Temperature [Min]-40 °C
Package / Case6-XFBGA, DSBGA
Supplier Device Package6-DSBGA
Voltage - Supply [Max]5.5 V
Voltage - Supply [Min]1.65 V

Pricing

Prices provided here are for design reference only. For realtime values and availability, please visit the distributors directly

DistributorPackageQuantity$
DigikeyCut Tape (CT) 1$ 0.65
10$ 0.55
25$ 0.52
100$ 0.41
250$ 0.38
500$ 0.32
1000$ 0.25
Digi-Reel® 1$ 0.65
10$ 0.55
25$ 0.52
100$ 0.41
250$ 0.38
500$ 0.32
1000$ 0.25
Tape & Reel (TR) 3000$ 0.23
6000$ 0.21
15000$ 0.20
30000$ 0.19
Texas InstrumentsLARGE T&R 1$ 0.42
100$ 0.28
250$ 0.22
1000$ 0.15

Description

General part information

SN74LVC1G386 Series

The SN74LVC1G386 device performs the Boolean function Y = A × B × C in positive logic.

NanoStar™ and NanoFree™ package technology is a major breakthrough in IC packaging concepts, using the die as the package.

This device is fully specified for partial-power-down applications using Ioff. The Ioffcircuitry disables the outputs, preventing damaging current backflow through the device when it is powered down.

Documents

Technical documentation and resources

How to Select Little Logic (Rev. A)

Application note

Input and Output Characteristics of Digital Integrated Circuits

Application note

Signal Switch Data Book (Rev. A)

User guide

Little Logic Guide 2018 (Rev. G)

Selection guide

Design Summary for WCSP Little Logic (Rev. B)

Product overview

Live Insertion

Application note

Understanding Advanced Bus-Interface Products Design Guide

Application note

Understanding and Interpreting Standard-Logic Data Sheets (Rev. C)

Application note

Standard Linear & Logic for PCs, Servers & Motherboards

More literature

Selecting the Right Level Translation Solution (Rev. A)

Application note

LVC Characterization Information

Application note

Bus-Interface Devices With Output-Damping Resistors Or Reduced-Drive Outputs (Rev. A)

Application note

LOGIC Pocket Data Book (Rev. B)

User guide

Semiconductor Packing Material Electrostatic Discharge (ESD) Protection

Application note

SN74LVC1G386 datasheet (Rev. E)

Data sheet

Logic Guide (Rev. AB)

Selection guide

Migration From 3.3-V To 2.5-V Power Supplies For Logic Devices

Application note

LVC and LV Low-Voltage CMOS Logic Data Book (Rev. B)

User guide

Texas Instruments Little Logic Application Report

Application note

16-Bit Widebus Logic Families in 56-Ball, 0.65-mm Pitch Very Thin Fine-Pitch BGA (Rev. B)

Application note

Power-Up 3-State (PU3S) Circuits in TI Standard Logic Devices

Application note

Use of the CMOS Unbuffered Inverter in Oscillator Circuits

Application note

STANDARD LINEAR AND LOGIC FOR DVD/VCD PLAYERS

More literature

Low-Voltage Logic (LVC) Designer's Guide

Design guide

Implications of Slow or Floating CMOS Inputs (Rev. E)

Application note

TI IBIS File Creation, Validation, and Distribution Processes

Application note

CMOS Power Consumption and CPD Calculation (Rev. B)

Application note